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Commit 9d9ff3d2 authored by Guillaume Ranquet's avatar Guillaume Ranquet Committed by Vinod Koul
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phy: mediatek: hdmi: mt8195: fix wrong pll calculus

The clock rate calculus in mtk_hdmi_pll_calc() was wrong when it has
been replaced by 'div_u64'.

Fix the issue by multiplying the values in the denominator instead of
dividing them.

Fixes: 45810d48

 ("phy: mediatek: add support for phy-mtk-hdmi-mt8195")
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: default avatarGuillaume Ranquet <granquet@baylibre.com>
Link: https://lore.kernel.org/r/20230413-fixes-for-mt8195-hdmi-phy-v2-2-bbad62e64321@baylibre.com
Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 714dd3c2
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