EDAC/amd64: Read back the scrub rate PCI register on F15h
[ Upstream commit ee470bb2 ] Commit: da92110d ("EDAC, amd64_edac: Extend scrub rate support to F15hM60h") added support for F15h, model 0x60 CPUs but in doing so, missed to read back SCRCTRL PCI config register on F15h CPUs which are *not* model 0x60. Add that read so that doing $ cat /sys/devices/system/edac/mc/mc0/sdram_scrub_rate can show the previously set DRAM scrub rate. Fixes: da92110d ("EDAC, amd64_edac: Extend scrub rate support to F15hM60h") Reported-by:Anders Andersson <pipatron@gmail.com> Signed-off-by:
Borislav Petkov <bp@suse.de> Cc: <stable@vger.kernel.org> #v4.4.. Link: https://lkml.kernel.org/r/CAKkunMbNWppx_i6xSdDHLseA2QQmGJqj_crY=NF-GZML5np4Vw@mail.gmail.com Signed-off-by:
Sasha Levin <sashal@kernel.org>
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