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Commit 9bd405c4 authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Conor Dooley
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cache: ax45mp_cache: Align end size to cache boundary in ax45mp_dma_cache_wback()

Align the end size to cache boundary size in ax45mp_dma_cache_wback()
callback likewise done in ax45mp_dma_cache_inv() callback.

Additionally return early in case of start == end.

Fixes: d34599bc

 ("cache: Add L2 cache management for Andes AX45MP RISC-V core")
Reported-by: default avatarPavel Machek <pavel@denx.de>
Link: https://lore.kernel.org/cip-dev/ZYsdKDiw7G+kxQ3m@duo.ucw.cz/
Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
parent 6613476e
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