PCI: dwc: Group DBI registers writes requiring unlocking

Some of DesignWare core's DBI registers (a.k.a configuration space
registers) are write-protected with a lock without enabling which they
are read-only by default.

These write-protected registers are implementation specific. Tegra194's
BAR-0 register which is at offset 0x10 in the configuration space is an
example. Current implementation in dw_pcie_setup_rc() API attempts to
unlock those write-protected registers whenever they are updated and
lock them back again for writing.

Group all write-protected registers writes so that locking and unlocking
is performed once to avoid bloating the code with multiple unlock/lock
sequences for all those write-protected registers.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-by: Jingoo Han <jingoohan1@gmail.com>