mtd: spi-nor-core: Add support for volatile QE bit
Some of Spansion/Cypress chips support volatile version of configuration registers and it is recommended to update volatile registers in the field application due to a risk of the non-volatile registers corruption by power interrupt. This patch adds a function to set Quad Enable bit in CFR1 volatile. Signed-off-by:Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by:
Jagan Teki <jagan@amarulasolutions.com>
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