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Commit 8e85f36a authored by This contributor prefers not to receive mails's avatar This contributor prefers not to receive mails Committed by Tom Rini
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pci: Fix configuring io/memory base and limit registers of PCI bridges



Lower 4 bits of PCI_MEMORY_BASE and PCI_MEMORY_LIMIT registers are reserved
and should be zero. So do not set them to non-zero value.

Lower 4 bits of PCI_PREF_MEMORY_BASE and PCI_PREF_MEMORY_LIMIT registers
contain information if 64-bit memory addressing is supported. So preserve
this information when overwriting these registers.

Lower 4 bits of PCI_IO_BASE and PCI_IO_LIMIT register contain information
if 32-bit io addressing is supported. So preserve this information and do
not try to configure 32-bit io addressing (via PCI_IO_BASE_UPPER16 and
PCI_IO_LIMIT_UPPER16 registers) when it is unsupported.

Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Reviewed-by: default avatarStefan Roese <sr@denx.de>
parent df3ab898
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