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Commit 8019d32c authored by Heiko Stuebner's avatar Heiko Stuebner Committed by Kever Yang
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rockchip: px30: enable spl-fifo-mode for both emmc and sdmmc on evb



As part of loading trustedfirmware, the SPL is required to place portions
of code into the socs sram but the mmc controllers can only do dma
transfers into the regular memory, not sram.

The results of this are not directly visible in u-boot itself, but
manifest as security-relate cpu aborts during boot of for example Linux.

There were a number of attempts to solve this elegantly but so far
discussion is still ongoing, so to make the board at least boot correctly
put both mmc controllers into fifo-mode, which also circumvents the
issue for now.

Signed-off-by: default avatarHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: default avatarKever Yang <kever.yang@rock-chips.com>
Reviewed-by: default avatarPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
parent c8dd0e42
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