Skip to content
Commit 71f07731 authored by Ashok Reddy Soma's avatar Ashok Reddy Soma Committed by Michal Simek
Browse files

mmc: zynq_sdhci: Fix timing macros for MMC High speed



Timing macro's are wrong for MMC_HS_52 and MMC_DDR_52. Fix it with
correct values of MMC_TIMING_MMC_HS and MMC_TIMING_MMC_DDR52 respectively.

Signed-off-by: default avatarAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1656319965-12124-1-git-send-email-ashok.reddy.soma@xilinx.com


Signed-off-by: default avatarMichal Simek <michal.simek@amd.com>
parent 156cb2af
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment