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Commit 58afff43 authored by Michal Simek's avatar Michal Simek
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clk: zynq: Show watchdog clock rate properly 



watchdog clock is also connected to cpu 1X clocksource.

Zynq> clk dump
...

Before:
      swdt          4294967290
After:
      swdt           111111110

Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
parent 1cf6cac4
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