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Commit 4b4159d0 authored by Zong Li's avatar Zong Li Committed by Leo Yu-Chi Liang
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board: sifive: support spl multi-dtb on unmatched board



There are two revisions of unmatched board with different DDR timing,
we'd like to support multi-dtb mechanism in SPL, then it selects the
right DTB at runtime according to PCB revision in I2C EEPROM.

Signed-off-by: default avatarZong Li <zong.li@sifive.com>
Reviewed-by: default avatarLeo Yu-Chi Liang <ycliang@andestech.com>
parent ffe9a394
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