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Commit 3da15f0b authored by Manoj Sai's avatar Manoj Sai Committed by Kever Yang
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phy: rockchip-inno-usb2: Add USB2 PHY for rk3568



RK3568 has two USB 2.0 PHYs, and each PHY has two ports, the OTG port
of PHY0 support OTG mode with charging detection function, they are
similar to previous Rockchip SoCs.

However, there are three different designs for RK3568 USB 2.0 PHY.
1. RK3568 uses independent USB GRF module for each USB 2.0 PHY.
2. RK3568 accesses the registers of USB 2.0 PHY IP directly by APB.
3. The two ports of USB 2.0 PHY share one interrupt.

This patch only PHY1 with necessary attributes required to function
USBPHY1 on U-Boot.

Co-developed-by: default avatarRen Jianing <jianing.ren@rock-chips.com>
Signed-off-by: default avatarRen Jianing <jianing.ren@rock-chips.com>
Co-developed-by: default avatarJagan Teki <jagan@amarulasolutions.com>
Signed-off-by: default avatarJagan Teki <jagan@amarulasolutions.com>
Signed-off-by: default avatarManoj Sai <abbaraju.manojsai@amarulasolutions.com>
Reviewed-by: default avatarKever Yang <kever.yang@rock-chips.com>
parent d538efb9
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