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Commit 34f27b2e authored by James Doublesin's avatar James Doublesin Committed by Tom Rini
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ram: k3-am654: Do not rely on default values for certain DDR register



Added the following registers to the DDR configuration:
- ACIOCR0,
- ACIOCR3,
- V2H_CTL_REG,
- DX8SLxDQSCTL.

Modified enable_dqs_pd and disable_dqs_pd to only touch the associated
bit fields for pullup and pulldown registers (to preserve slew rate and
other bits in that same register). Also update the dts files in the same
patch to maintain git bisectability.

Signed-off-by: default avatarJames Doublesin <doublesin@ti.com>
Signed-off-by: default avatarLokesh Vutla <lokeshvutla@ti.com>
parent c78ac7a0
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