pinctrl: exynos: Support different register types in pin banks
Get rid of hard-coded register offsets and widths. Instead provide a way for pinctrl drivers to specify different pin bank register offsets and widths. This in turn makes it possible to add support for new SoCs that have registers with offset/width values different than generic ones already available in pinctrl-exynos driver. Offset constants (now unused in pinctrl-exynos.c) are moved to pinctrl-exynos7420 driver, which is the single user of those constants. The design of this patch follows Linux kernel pinctrl-exynos driver design, in terms of added data structures and types. This patch doesn't add support for any new SoCs and shouldn't introduce any functional changes. Signed-off-by:Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by:
Minkyu Kang <mk7.kang@samsung.com>
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