mtd: spi: renesas: Add 4 bytes address mode support
This patch adds 4-byte address mode support. Because traditional access based on FIFO/shift register, it's complex to specify information like opcode, address length, dummy bytes etc to flash. Replace the traditional access by spi-mem layer which is essential to make 4-byte address mode support possible. Reviewed-by:Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by:
Cong Dang <cong.dang.xn@renesas.com> Signed-off-by:
Hai Pham <hai.pham.ud@renesas.com> Signed-off-by:
Marek Vasut <marek.vasut+renesas@mailbox.org>
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