Commit ff6b11cc authored by Srinivasan Shanmugam's avatar Srinivasan Shanmugam Committed by Alex Deucher
Browse files

drm/amd/amdgpu: Fix errors & warnings in mmhub_v1_8.c 



Fix below errors & warnings reported by checkpatch:

ERROR: code indent should use tabs where possible
WARNING: please, no space before tabs
WARNING: please, no spaces at the start of a line
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
ERROR: space prohibited before that '++' (ctx:WxB)
WARNING: Block comments use a trailing */ on a separate line

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: default avatarSrinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 20a29ac0

drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

+7 −5
Original line number Diff line number Diff line
@@ -328,7 +328,7 @@ static void mmhub_v1_8_disable_identity_aperture(struct amdgpu_device *adev) 
static void mmhub_v1_8_setup_vmid_config(struct amdgpu_device *adev)

{

	struct amdgpu_vmhub *hub;

	unsigned num_level, block_size;

	unsigned int num_level, block_size;

	uint32_t tmp, inst_mask;

	int i, j;
@@ -778,7 +778,8 @@ static void mmhub_v1_8_inst_reset_ras_err_status(struct amdgpu_device *adev, 
	mmea_err_status_addr_dist = regMMEA1_ERR_STATUS - regMMEA0_ERR_STATUS;

	for (i = 0; i < ARRAY_SIZE(mmhub_v1_8_mmea_err_status_reg); i++) {

		/* force clk branch on for response path

		 * set MMEA0_CGTT_CLK_CTRL.SOFT_OVERRIDE_RETURN = 1 */

		 * set MMEA0_CGTT_CLK_CTRL.SOFT_OVERRIDE_RETURN = 1

		 */

		reg_value = RREG32_SOC15_OFFSET(MMHUB, mmhub_inst,

						regMMEA0_CGTT_CLK_CTRL,

						i * mmea_cgtt_clk_cntl_addr_dist);
@@ -814,7 +815,8 @@ static void mmhub_v1_8_inst_reset_ras_err_status(struct amdgpu_device *adev, 


	/* reset mm_cane ras err status

	 * force clk branch on for response path

	 * set MM_CANE_ICG_CTRL.SOFT_OVERRIDE_ATRET = 1 */

	 * set MM_CANE_ICG_CTRL.SOFT_OVERRIDE_ATRET = 1

	 */

	reg_value = RREG32_SOC15(MMHUB, mmhub_inst, regMM_CANE_ICG_CTRL);

	reg_value = REG_SET_FIELD(reg_value, MM_CANE_ICG_CTRL,

				  SOFT_OVERRIDE_ATRET, 1);