Commit 20a29ac0 authored by Likun Gao's avatar Likun Gao Committed by Alex Deucher
Browse files

drm/amdgpu: retire set_vga_state for some ASIC 



set_vga_state operation only allowed on SI generation
ASIC, retire the realted function on those ASIC which
did not do anything.

Signed-off-by: default avatarLikun Gao <Likun.Gao@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9788d087

drivers/gpu/drm/amd/amdgpu/nv.c

+0 −6
Original line number Diff line number Diff line
@@ -341,11 +341,6 @@ void nv_grbm_select(struct amdgpu_device *adev, 
	WREG32_SOC15(GC, 0, mmGRBM_GFX_CNTL, grbm_gfx_cntl);

}



static void nv_vga_set_state(struct amdgpu_device *adev, bool state)

{

	/* todo */

}



static bool nv_read_disabled_bios(struct amdgpu_device *adev)

{

	/* todo */
@@ -654,7 +649,6 @@ static const struct amdgpu_asic_funcs nv_asic_funcs = 
	.read_register = &nv_read_register,

	.reset = &nv_asic_reset,

	.reset_method = &nv_asic_reset_method,

	.set_vga_state = &nv_vga_set_state,

	.get_xclk = &nv_get_xclk,

	.set_uvd_clocks = &nv_set_uvd_clocks,

	.set_vce_clocks = &nv_set_vce_clocks,

drivers/gpu/drm/amd/amdgpu/soc15.c

+0 −8
Original line number Diff line number Diff line
@@ -346,11 +346,6 @@ void soc15_grbm_select(struct amdgpu_device *adev, 
	WREG32_SOC15_RLC_SHADOW(GC, xcc_id, mmGRBM_GFX_CNTL, grbm_gfx_cntl);

}



static void soc15_vga_set_state(struct amdgpu_device *adev, bool state)

{

	/* todo */

}



static bool soc15_read_disabled_bios(struct amdgpu_device *adev)

{

	/* todo */
@@ -849,7 +844,6 @@ static const struct amdgpu_asic_funcs soc15_asic_funcs = 
	.read_register = &soc15_read_register,

	.reset = &soc15_asic_reset,

	.reset_method = &soc15_asic_reset_method,

	.set_vga_state = &soc15_vga_set_state,

	.get_xclk = &soc15_get_xclk,

	.set_uvd_clocks = &soc15_set_uvd_clocks,

	.set_vce_clocks = &soc15_set_vce_clocks,
@@ -871,7 +865,6 @@ static const struct amdgpu_asic_funcs vega20_asic_funcs = 
	.read_register = &soc15_read_register,

	.reset = &soc15_asic_reset,

	.reset_method = &soc15_asic_reset_method,

	.set_vga_state = &soc15_vga_set_state,

	.get_xclk = &soc15_get_xclk,

	.set_uvd_clocks = &soc15_set_uvd_clocks,

	.set_vce_clocks = &soc15_set_vce_clocks,
@@ -893,7 +886,6 @@ static const struct amdgpu_asic_funcs aqua_vanjaram_asic_funcs = 
	.read_register = &soc15_read_register,

	.reset = &soc15_asic_reset,

	.reset_method = &soc15_asic_reset_method,

	.set_vga_state = &soc15_vga_set_state,

	.get_xclk = &soc15_get_xclk,

	.set_uvd_clocks = &soc15_set_uvd_clocks,

	.set_vce_clocks = &soc15_set_vce_clocks,

drivers/gpu/drm/amd/amdgpu/soc21.c

+0 −6
Original line number Diff line number Diff line
@@ -248,11 +248,6 @@ void soc21_grbm_select(struct amdgpu_device *adev, 
	WREG32_SOC15(GC, 0, regGRBM_GFX_CNTL, grbm_gfx_cntl);

}



static void soc21_vga_set_state(struct amdgpu_device *adev, bool state)

{

	/* todo */

}



static bool soc21_read_disabled_bios(struct amdgpu_device *adev)

{

	/* todo */
@@ -559,7 +554,6 @@ static const struct amdgpu_asic_funcs soc21_asic_funcs = 
	.read_register = &soc21_read_register,

	.reset = &soc21_asic_reset,

	.reset_method = &soc21_asic_reset_method,

	.set_vga_state = &soc21_vga_set_state,

	.get_xclk = &soc21_get_xclk,

	.set_uvd_clocks = &soc21_set_uvd_clocks,

	.set_vce_clocks = &soc21_set_vce_clocks,

drivers/gpu/drm/amd/amdgpu/vi.c

+0 −6
Original line number Diff line number Diff line
@@ -580,11 +580,6 @@ void vi_srbm_select(struct amdgpu_device *adev, 
	WREG32(mmSRBM_GFX_CNTL, srbm_gfx_cntl);

}



static void vi_vga_set_state(struct amdgpu_device *adev, bool state)

{

	/* todo */

}



static bool vi_read_disabled_bios(struct amdgpu_device *adev)

{

	u32 bus_cntl;
@@ -1435,7 +1430,6 @@ static const struct amdgpu_asic_funcs vi_asic_funcs = 
	.read_register = &vi_read_register,

	.reset = &vi_asic_reset,

	.reset_method = &vi_asic_reset_method,

	.set_vga_state = &vi_vga_set_state,

	.get_xclk = &vi_get_xclk,

	.set_uvd_clocks = &vi_set_uvd_clocks,

	.set_vce_clocks = &vi_set_vce_clocks,