Commit fde25beb authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2022-11-04-1' of git://anongit.freedesktop.org/drm/drm

Pull drm fixes from Dave Airlie:
 "This is the weekly fixes for rc4. Misc fixes across rockchip, imx,
  amdgpu and i915.

  The biggest change is for amdkfd where the trap handler needs an
  updated fw from a header which makes it a bit larger. I hadn't noticed
  this particular file before so I'm going to figure out what the magic
  is for, but the fix should be fine for now.

  amdgpu:
   - DCN 3.1.4 fixes
   - DCN 3.2.x fixes
   - GC 11.x fixes
   - Virtual display fix
   - Fail suspend if resources can't be evicted
   - SR-IOV fix
   - Display PSR fix

  amdkfd:
   - Fix possible NULL pointer deref
   - GC 11.x trap handler fix

  i915:
   - Add locking around DKL PHY register accesses
   - Stop abusing swiotlb_max_segment
   - Filter out invalid outputs more sensibly
   - Setup DDC fully before output init
   - Simplify intel_panel_add_edid_alt_fixed_modes()
   - Grab mode_config.mutex during LVDS init to avoid WARNs

  rockchip:
   - fix probing issues
   - fix framebuffer without iommu
   - fix vop selection
   - fix NULL ptr access

  imx:
   - Fix Kconfig
   - fix mode_valid function"

* tag 'drm-fixes-2022-11-04-1' of git://anongit.freedesktop.org/drm/drm: (35 commits)
  drm/amdkfd: update GFX11 CWSR trap handler
  drm/amd/display: Investigate tool reported FCLK P-state deviations
  drm/amd/display: Add DSC delay factor workaround
  drm/amd/display: Round up DST_after_scaler to nearest int
  drm/amd/display: Use forced DSC bpp in DML
  drm/amd/display: Fix DCN32 DSC delay calculation
  drm/amdgpu: Disable GPU reset on SRIOV before remove pci.
  drm/amdgpu: disable GFXOFF during compute for GFX11
  drm/amd: Fail the suspend if resources can't be evicted
  drm/amdkfd: Fix NULL pointer dereference in svm_migrate_to_ram()
  drm/amdgpu: correct MES debugfs versions
  drm/amdgpu: set fb_modifiers_not_supported in vkms
  drm/amd/display: cursor update command incomplete
  drm/amd/display: Enable timing sync on DCN32
  drm/amd/display: Set memclk levels to be at least 1 for dcn32
  drm/amd/display: Update latencies on DCN321
  drm/amd/display: Limit dcn32 to 1950Mhz display clock
  drm/amd/display: Ignore Cable ID Feature
  drm/amd/display: Update DSC capabilitie for DCN314
  drm/imx: imx-tve: Fix return type of imx_tve_connector_mode_valid
  ...
parents db385e0b 6295f1d8
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+7 −0
Original line number Diff line number Diff line
@@ -706,6 +706,13 @@ int amdgpu_amdkfd_submit_ib(struct amdgpu_device *adev,

void amdgpu_amdkfd_set_compute_idle(struct amdgpu_device *adev, bool idle)
{
	/* Temporary workaround to fix issues observed in some
	 * compute applications when GFXOFF is enabled on GFX11.
	 */
	if (IP_VERSION_MAJ(adev->ip_versions[GC_HWIP][0]) == 11) {
		pr_debug("GFXOFF is %s\n", idle ? "enabled" : "disabled");
		amdgpu_gfx_off_ctrl(adev, idle);
	}
	amdgpu_dpm_switch_power_profile(adev,
					PP_SMC_POWER_PROFILE_COMPUTE,
					!idle);
+10 −5
Original line number Diff line number Diff line
@@ -4060,15 +4060,18 @@ void amdgpu_device_fini_sw(struct amdgpu_device *adev)
 * at suspend time.
 *
 */
static void amdgpu_device_evict_resources(struct amdgpu_device *adev)
static int amdgpu_device_evict_resources(struct amdgpu_device *adev)
{
	int ret;

	/* No need to evict vram on APUs for suspend to ram or s2idle */
	if ((adev->in_s3 || adev->in_s0ix) && (adev->flags & AMD_IS_APU))
		return;
		return 0;

	if (amdgpu_ttm_evict_resources(adev, TTM_PL_VRAM))
	ret = amdgpu_ttm_evict_resources(adev, TTM_PL_VRAM);
	if (ret)
		DRM_WARN("evicting device resources failed\n");

	return ret;
}

/*
@@ -4118,7 +4121,9 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon)
	if (!adev->in_s0ix)
		amdgpu_amdkfd_suspend(adev, adev->in_runpm);

	amdgpu_device_evict_resources(adev);
	r = amdgpu_device_evict_resources(adev);
	if (r)
		return r;

	amdgpu_fence_driver_hw_fini(adev);

+2 −1
Original line number Diff line number Diff line
@@ -2201,7 +2201,8 @@ amdgpu_pci_remove(struct pci_dev *pdev)
		pm_runtime_forbid(dev->dev);
	}

	if (adev->ip_versions[MP1_HWIP][0] == IP_VERSION(13, 0, 2)) {
	if (adev->ip_versions[MP1_HWIP][0] == IP_VERSION(13, 0, 2) &&
	    !amdgpu_sriov_vf(adev)) {
		bool need_to_reset_gpu = false;

		if (adev->gmc.xgmi.num_physical_nodes > 1) {
+6 −4
Original line number Diff line number Diff line
@@ -337,12 +337,14 @@ static int amdgpu_firmware_info(struct drm_amdgpu_info_firmware *fw_info,
		fw_info->feature = adev->psp.cap_feature_version;
		break;
	case AMDGPU_INFO_FW_MES_KIQ:
		fw_info->ver = adev->mes.ucode_fw_version[0];
		fw_info->feature = 0;
		fw_info->ver = adev->mes.kiq_version & AMDGPU_MES_VERSION_MASK;
		fw_info->feature = (adev->mes.kiq_version & AMDGPU_MES_FEAT_VERSION_MASK)
					>> AMDGPU_MES_FEAT_VERSION_SHIFT;
		break;
	case AMDGPU_INFO_FW_MES:
		fw_info->ver = adev->mes.ucode_fw_version[1];
		fw_info->feature = 0;
		fw_info->ver = adev->mes.sched_version & AMDGPU_MES_VERSION_MASK;
		fw_info->feature = (adev->mes.sched_version & AMDGPU_MES_FEAT_VERSION_MASK)
					>> AMDGPU_MES_FEAT_VERSION_SHIFT;
		break;
	case AMDGPU_INFO_FW_IMU:
		fw_info->ver = adev->gfx.imu_fw_version;
+2 −0
Original line number Diff line number Diff line
@@ -500,6 +500,8 @@ static int amdgpu_vkms_sw_init(void *handle)

	adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base;

	adev_to_drm(adev)->mode_config.fb_modifiers_not_supported = true;

	r = amdgpu_display_modeset_create_props(adev);
	if (r)
		return r;
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