Commit fd85b667 authored by Marc Zyngier's avatar Marc Zyngier
Browse files

KVM: arm64: Disintegrate SPSR array 



As we're about to move SPSR_EL1 into the VNCR page, we need to
disassociate it from the rest of the 32bit cruft. Let's break
the array into individual fields.

Reviewed-by: default avatarJames Morse <james.morse@arm.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent 1bded23e

arch/arm64/include/asm/kvm_emulate.h

+2 −2
Original line number Diff line number Diff line
@@ -176,7 +176,7 @@ static inline unsigned long vcpu_read_spsr(const struct kvm_vcpu *vcpu) 
	if (vcpu->arch.sysregs_loaded_on_cpu)

		return read_sysreg_el1(SYS_SPSR);

	else

		return vcpu->arch.ctxt.spsr[KVM_SPSR_EL1];

		return vcpu->arch.ctxt.spsr_el1;

}



static inline void vcpu_write_spsr(struct kvm_vcpu *vcpu, unsigned long v)
@@ -189,7 +189,7 @@ static inline void vcpu_write_spsr(struct kvm_vcpu *vcpu, unsigned long v) 
	if (vcpu->arch.sysregs_loaded_on_cpu)

		write_sysreg_el1(v, SYS_SPSR);

	else

		vcpu->arch.ctxt.spsr[KVM_SPSR_EL1] = v;

		vcpu->arch.ctxt.spsr_el1 = v;

}



/*

arch/arm64/include/asm/kvm_host.h

+5 −1
Original line number Diff line number Diff line
@@ -241,7 +241,11 @@ enum vcpu_sysreg { 
struct kvm_cpu_context {

	struct user_pt_regs regs;	/* sp = sp_el0 */



	u64	spsr[KVM_NR_SPSR];

	u64	spsr_el1;		/* aka spsr_svc */

	u64	spsr_abt;

	u64	spsr_und;

	u64	spsr_irq;

	u64	spsr_fiq;



	struct user_fpsimd_state fp_regs;

arch/arm64/kvm/guest.c

+14 −5
Original line number Diff line number Diff line
@@ -134,11 +134,20 @@ static void *core_reg_addr(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) 
	case KVM_REG_ARM_CORE_REG(elr_el1):

		return __ctxt_sys_reg(&vcpu->arch.ctxt, ELR_EL1);



	case KVM_REG_ARM_CORE_REG(spsr[0]) ...

	     KVM_REG_ARM_CORE_REG(spsr[KVM_NR_SPSR - 1]):

		off -= KVM_REG_ARM_CORE_REG(spsr[0]);

		off /= 2;

		return &vcpu->arch.ctxt.spsr[off];

	case KVM_REG_ARM_CORE_REG(spsr[KVM_SPSR_EL1]):

		return &vcpu->arch.ctxt.spsr_el1;



	case KVM_REG_ARM_CORE_REG(spsr[KVM_SPSR_ABT]):

		return &vcpu->arch.ctxt.spsr_abt;



	case KVM_REG_ARM_CORE_REG(spsr[KVM_SPSR_UND]):

		return &vcpu->arch.ctxt.spsr_und;



	case KVM_REG_ARM_CORE_REG(spsr[KVM_SPSR_IRQ]):

		return &vcpu->arch.ctxt.spsr_irq;



	case KVM_REG_ARM_CORE_REG(spsr[KVM_SPSR_FIQ]):

		return &vcpu->arch.ctxt.spsr_fiq;



	case KVM_REG_ARM_CORE_REG(fp_regs.vregs[0]) ...

	     KVM_REG_ARM_CORE_REG(fp_regs.vregs[31]):

arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h

+10 −18
Original line number Diff line number Diff line
@@ -48,7 +48,7 @@ static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt) 


	ctxt_sys_reg(ctxt, SP_EL1)	= read_sysreg(sp_el1);

	ctxt_sys_reg(ctxt, ELR_EL1)	= read_sysreg_el1(SYS_ELR);

	ctxt->spsr[KVM_SPSR_EL1]	= read_sysreg_el1(SYS_SPSR);

	ctxt->spsr_el1			= read_sysreg_el1(SYS_SPSR);

}



static inline void __sysreg_save_el2_return_state(struct kvm_cpu_context *ctxt)
@@ -127,7 +127,7 @@ static inline void __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt) 


	write_sysreg(ctxt_sys_reg(ctxt, SP_EL1),	sp_el1);

	write_sysreg_el1(ctxt_sys_reg(ctxt, ELR_EL1),	SYS_ELR);

	write_sysreg_el1(ctxt->spsr[KVM_SPSR_EL1],	SYS_SPSR);

	write_sysreg_el1(ctxt->spsr_el1,		SYS_SPSR);

}



static inline void __sysreg_restore_el2_return_state(struct kvm_cpu_context *ctxt)
@@ -158,17 +158,13 @@ static inline void __sysreg_restore_el2_return_state(struct kvm_cpu_context *ctx 


static inline void __sysreg32_save_state(struct kvm_vcpu *vcpu)

{

	u64 *spsr;



	if (!vcpu_el1_is_32bit(vcpu))

		return;



	spsr = vcpu->arch.ctxt.spsr;



	spsr[KVM_SPSR_ABT] = read_sysreg(spsr_abt);

	spsr[KVM_SPSR_UND] = read_sysreg(spsr_und);

	spsr[KVM_SPSR_IRQ] = read_sysreg(spsr_irq);

	spsr[KVM_SPSR_FIQ] = read_sysreg(spsr_fiq);

	vcpu->arch.ctxt.spsr_abt = read_sysreg(spsr_abt);

	vcpu->arch.ctxt.spsr_und = read_sysreg(spsr_und);

	vcpu->arch.ctxt.spsr_irq = read_sysreg(spsr_irq);

	vcpu->arch.ctxt.spsr_fiq = read_sysreg(spsr_fiq);



	__vcpu_sys_reg(vcpu, DACR32_EL2) = read_sysreg(dacr32_el2);

	__vcpu_sys_reg(vcpu, IFSR32_EL2) = read_sysreg(ifsr32_el2);
@@ -179,17 +175,13 @@ static inline void __sysreg32_save_state(struct kvm_vcpu *vcpu) 


static inline void __sysreg32_restore_state(struct kvm_vcpu *vcpu)

{

	u64 *spsr;



	if (!vcpu_el1_is_32bit(vcpu))

		return;



	spsr = vcpu->arch.ctxt.spsr;



	write_sysreg(spsr[KVM_SPSR_ABT], spsr_abt);

	write_sysreg(spsr[KVM_SPSR_UND], spsr_und);

	write_sysreg(spsr[KVM_SPSR_IRQ], spsr_irq);

	write_sysreg(spsr[KVM_SPSR_FIQ], spsr_fiq);

	write_sysreg(vcpu->arch.ctxt.spsr_abt, spsr_abt);

	write_sysreg(vcpu->arch.ctxt.spsr_und, spsr_und);

	write_sysreg(vcpu->arch.ctxt.spsr_irq, spsr_irq);

	write_sysreg(vcpu->arch.ctxt.spsr_fiq, spsr_fiq);



	write_sysreg(__vcpu_sys_reg(vcpu, DACR32_EL2), dacr32_el2);

	write_sysreg(__vcpu_sys_reg(vcpu, IFSR32_EL2), ifsr32_el2);

arch/arm64/kvm/regmap.c

+32 −3
Original line number Diff line number Diff line
@@ -147,8 +147,20 @@ unsigned long vcpu_read_spsr32(const struct kvm_vcpu *vcpu) 
{

	int spsr_idx = vcpu_spsr32_mode(vcpu);



	if (!vcpu->arch.sysregs_loaded_on_cpu)

		return vcpu->arch.ctxt.spsr[spsr_idx];

	if (!vcpu->arch.sysregs_loaded_on_cpu) {

		switch (spsr_idx) {

		case KVM_SPSR_SVC:

			return vcpu->arch.ctxt.spsr_el1;

		case KVM_SPSR_ABT:

			return vcpu->arch.ctxt.spsr_abt;

		case KVM_SPSR_UND:

			return vcpu->arch.ctxt.spsr_und;

		case KVM_SPSR_IRQ:

			return vcpu->arch.ctxt.spsr_irq;

		case KVM_SPSR_FIQ:

			return vcpu->arch.ctxt.spsr_fiq;

		}

	}



	switch (spsr_idx) {

	case KVM_SPSR_SVC:
@@ -171,7 +183,24 @@ void vcpu_write_spsr32(struct kvm_vcpu *vcpu, unsigned long v) 
	int spsr_idx = vcpu_spsr32_mode(vcpu);



	if (!vcpu->arch.sysregs_loaded_on_cpu) {

		vcpu->arch.ctxt.spsr[spsr_idx] = v;

		switch (spsr_idx) {

		case KVM_SPSR_SVC:

			vcpu->arch.ctxt.spsr_el1 = v;

			break;

		case KVM_SPSR_ABT:

			vcpu->arch.ctxt.spsr_abt = v;

			break;

		case KVM_SPSR_UND:

			vcpu->arch.ctxt.spsr_und = v;

			break;

		case KVM_SPSR_IRQ:

			vcpu->arch.ctxt.spsr_irq = v;

			break;

		case KVM_SPSR_FIQ:

			vcpu->arch.ctxt.spsr_fiq = v;

			break;

		}



		return;

	}