Loading arch/arm64/include/asm/kvm_host.h +1 −2 Original line number Original line Diff line number Diff line Loading @@ -186,6 +186,7 @@ enum vcpu_sysreg { APGAKEYHI_EL1, APGAKEYHI_EL1, ELR_EL1, ELR_EL1, SP_EL1, /* 32bit specific registers. Keep them at the end of the range */ /* 32bit specific registers. Keep them at the end of the range */ DACR32_EL2, /* Domain Access Control Register */ DACR32_EL2, /* Domain Access Control Register */ Loading Loading @@ -240,8 +241,6 @@ enum vcpu_sysreg { struct kvm_cpu_context { struct kvm_cpu_context { struct user_pt_regs regs; /* sp = sp_el0 */ struct user_pt_regs regs; /* sp = sp_el0 */ u64 sp_el1; u64 spsr[KVM_NR_SPSR]; u64 spsr[KVM_NR_SPSR]; struct user_fpsimd_state fp_regs; struct user_fpsimd_state fp_regs; Loading arch/arm64/kvm/guest.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -129,7 +129,7 @@ static void *core_reg_addr(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) return &vcpu->arch.ctxt.regs.pstate; return &vcpu->arch.ctxt.regs.pstate; case KVM_REG_ARM_CORE_REG(sp_el1): case KVM_REG_ARM_CORE_REG(sp_el1): return &vcpu->arch.ctxt.sp_el1; return __ctxt_sys_reg(&vcpu->arch.ctxt, SP_EL1); case KVM_REG_ARM_CORE_REG(elr_el1): case KVM_REG_ARM_CORE_REG(elr_el1): return __ctxt_sys_reg(&vcpu->arch.ctxt, ELR_EL1); return __ctxt_sys_reg(&vcpu->arch.ctxt, ELR_EL1); Loading arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h +2 −2 Original line number Original line Diff line number Diff line Loading @@ -46,7 +46,7 @@ static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt) ctxt_sys_reg(ctxt, PAR_EL1) = read_sysreg(par_el1); ctxt_sys_reg(ctxt, PAR_EL1) = read_sysreg(par_el1); ctxt_sys_reg(ctxt, TPIDR_EL1) = read_sysreg(tpidr_el1); ctxt_sys_reg(ctxt, TPIDR_EL1) = read_sysreg(tpidr_el1); ctxt->sp_el1 = read_sysreg(sp_el1); ctxt_sys_reg(ctxt, SP_EL1) = read_sysreg(sp_el1); ctxt_sys_reg(ctxt, ELR_EL1) = read_sysreg_el1(SYS_ELR); ctxt_sys_reg(ctxt, ELR_EL1) = read_sysreg_el1(SYS_ELR); ctxt->spsr[KVM_SPSR_EL1] = read_sysreg_el1(SYS_SPSR); ctxt->spsr[KVM_SPSR_EL1] = read_sysreg_el1(SYS_SPSR); } } Loading Loading @@ -125,7 +125,7 @@ static inline void __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt) write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR); write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR); } } write_sysreg(ctxt->sp_el1, sp_el1); write_sysreg(ctxt_sys_reg(ctxt, SP_EL1), sp_el1); write_sysreg_el1(ctxt_sys_reg(ctxt, ELR_EL1), SYS_ELR); write_sysreg_el1(ctxt_sys_reg(ctxt, ELR_EL1), SYS_ELR); write_sysreg_el1(ctxt->spsr[KVM_SPSR_EL1], SYS_SPSR); write_sysreg_el1(ctxt->spsr[KVM_SPSR_EL1], SYS_SPSR); } } Loading Loading
arch/arm64/include/asm/kvm_host.h +1 −2 Original line number Original line Diff line number Diff line Loading @@ -186,6 +186,7 @@ enum vcpu_sysreg { APGAKEYHI_EL1, APGAKEYHI_EL1, ELR_EL1, ELR_EL1, SP_EL1, /* 32bit specific registers. Keep them at the end of the range */ /* 32bit specific registers. Keep them at the end of the range */ DACR32_EL2, /* Domain Access Control Register */ DACR32_EL2, /* Domain Access Control Register */ Loading Loading @@ -240,8 +241,6 @@ enum vcpu_sysreg { struct kvm_cpu_context { struct kvm_cpu_context { struct user_pt_regs regs; /* sp = sp_el0 */ struct user_pt_regs regs; /* sp = sp_el0 */ u64 sp_el1; u64 spsr[KVM_NR_SPSR]; u64 spsr[KVM_NR_SPSR]; struct user_fpsimd_state fp_regs; struct user_fpsimd_state fp_regs; Loading
arch/arm64/kvm/guest.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -129,7 +129,7 @@ static void *core_reg_addr(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) return &vcpu->arch.ctxt.regs.pstate; return &vcpu->arch.ctxt.regs.pstate; case KVM_REG_ARM_CORE_REG(sp_el1): case KVM_REG_ARM_CORE_REG(sp_el1): return &vcpu->arch.ctxt.sp_el1; return __ctxt_sys_reg(&vcpu->arch.ctxt, SP_EL1); case KVM_REG_ARM_CORE_REG(elr_el1): case KVM_REG_ARM_CORE_REG(elr_el1): return __ctxt_sys_reg(&vcpu->arch.ctxt, ELR_EL1); return __ctxt_sys_reg(&vcpu->arch.ctxt, ELR_EL1); Loading
arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h +2 −2 Original line number Original line Diff line number Diff line Loading @@ -46,7 +46,7 @@ static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt) ctxt_sys_reg(ctxt, PAR_EL1) = read_sysreg(par_el1); ctxt_sys_reg(ctxt, PAR_EL1) = read_sysreg(par_el1); ctxt_sys_reg(ctxt, TPIDR_EL1) = read_sysreg(tpidr_el1); ctxt_sys_reg(ctxt, TPIDR_EL1) = read_sysreg(tpidr_el1); ctxt->sp_el1 = read_sysreg(sp_el1); ctxt_sys_reg(ctxt, SP_EL1) = read_sysreg(sp_el1); ctxt_sys_reg(ctxt, ELR_EL1) = read_sysreg_el1(SYS_ELR); ctxt_sys_reg(ctxt, ELR_EL1) = read_sysreg_el1(SYS_ELR); ctxt->spsr[KVM_SPSR_EL1] = read_sysreg_el1(SYS_SPSR); ctxt->spsr[KVM_SPSR_EL1] = read_sysreg_el1(SYS_SPSR); } } Loading Loading @@ -125,7 +125,7 @@ static inline void __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt) write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR); write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR); } } write_sysreg(ctxt->sp_el1, sp_el1); write_sysreg(ctxt_sys_reg(ctxt, SP_EL1), sp_el1); write_sysreg_el1(ctxt_sys_reg(ctxt, ELR_EL1), SYS_ELR); write_sysreg_el1(ctxt_sys_reg(ctxt, ELR_EL1), SYS_ELR); write_sysreg_el1(ctxt->spsr[KVM_SPSR_EL1], SYS_SPSR); write_sysreg_el1(ctxt->spsr[KVM_SPSR_EL1], SYS_SPSR); } } Loading