Commit fbbf4280 authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
Browse files

powerpc/8xx: Remove immr_map() and immr_unmap()



Since commit fb533d0c ("[POWERPC] 8xx: Infrastructure code cleanup.")
immr_map() is just returning mpc8xxx_immr pointer and immr_unmap()
do nothing.

We already have parts of code that use mpc8xxx_immr directly so get rid
of immr_map() and immr_unmap() by using mpc8xxx_immr directly. And avoid
going through local pointers that hide the pointed structure.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/633ed46f6015ff44d5599258647ea517f75d6a1d.1691474658.git.christophe.leroy@csgroup.eu
parent cb888cdf
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+0 −8
Original line number Diff line number Diff line
@@ -22,14 +22,6 @@
#define cpm2_unmap(addr) do {} while(0)
#endif

#ifdef CONFIG_PPC_8xx
#include <asm/8xx_immap.h>

#define immr_map(member) (&mpc8xx_immr->member)
#define immr_map_size(member, size) (&mpc8xx_immr->member)
#define immr_unmap(addr) do {} while (0)
#endif

static inline int uart_baudrate(void)
{
        return get_baudrate();
+3 −7
Original line number Diff line number Diff line
@@ -41,7 +41,7 @@
#include <asm/rheap.h>
#include <asm/cpm.h>

#include <asm/fs_pd.h>
#include <sysdev/fsl_soc.h>

#ifdef CONFIG_8xx_GPIO
#include <linux/gpio/legacy-of-mm-gpiochip.h>
@@ -54,8 +54,6 @@ immap_t __iomem *mpc8xx_immr = (void __iomem *)VIRT_IMMR_BASE;

void __init cpm_reset(void)
{
	sysconf8xx_t __iomem *siu_conf;

	cpmp = &mpc8xx_immr->im_cpm;

#ifndef CONFIG_PPC_EARLY_DEBUG_CPM
@@ -77,12 +75,10 @@ void __init cpm_reset(void)
	 * manual recommends it.
	 * Bit 25, FAM can also be set to use FEC aggressive mode (860T).
	 */
	siu_conf = immr_map(im_siu_conf);
	if ((mfspr(SPRN_IMMR) & 0xffff) == 0x0900) /* MPC885 */
		out_be32(&siu_conf->sc_sdcr, 0x40);
		out_be32(&mpc8xx_immr->im_siu_conf.sc_sdcr, 0x40);
	else
		out_be32(&siu_conf->sc_sdcr, 1);
	immr_unmap(siu_conf);
		out_be32(&mpc8xx_immr->im_siu_conf.sc_sdcr, 1);
}

static DEFINE_SPINLOCK(cmd_lock);
+19 −47
Original line number Diff line number Diff line
@@ -22,7 +22,6 @@

#include <asm/io.h>
#include <asm/8xx_immap.h>
#include <asm/fs_pd.h>
#include <mm/mmu_decl.h>

#include "pic.h"
@@ -41,14 +40,11 @@ static irqreturn_t timebase_interrupt(int irq, void *dev)
void __init __attribute__ ((weak))
init_internal_rtc(void)
{
	sit8xx_t __iomem *sys_tmr = immr_map(im_sit);

	/* Disable the RTC one second and alarm interrupts. */
	clrbits16(&sys_tmr->sit_rtcsc, (RTCSC_SIE | RTCSC_ALE));
	clrbits16(&mpc8xx_immr->im_sit.sit_rtcsc, (RTCSC_SIE | RTCSC_ALE));

	/* Enable the RTC */
	setbits16(&sys_tmr->sit_rtcsc, (RTCSC_RTF | RTCSC_RTE));
	immr_unmap(sys_tmr);
	setbits16(&mpc8xx_immr->im_sit.sit_rtcsc, (RTCSC_RTF | RTCSC_RTE));
}

static int __init get_freq(char *name, unsigned long *val)
@@ -80,23 +76,14 @@ static int __init get_freq(char *name, unsigned long *val)
void __init mpc8xx_calibrate_decr(void)
{
	struct device_node *cpu;
	cark8xx_t __iomem *clk_r1;
	car8xx_t __iomem *clk_r2;
	sitk8xx_t __iomem *sys_tmr1;
	sit8xx_t __iomem *sys_tmr2;
	int irq, virq;

	clk_r1 = immr_map(im_clkrstk);

	/* Unlock the SCCR. */
	out_be32(&clk_r1->cark_sccrk, ~KAPWR_KEY);
	out_be32(&clk_r1->cark_sccrk, KAPWR_KEY);
	immr_unmap(clk_r1);
	out_be32(&mpc8xx_immr->im_clkrstk.cark_sccrk, ~KAPWR_KEY);
	out_be32(&mpc8xx_immr->im_clkrstk.cark_sccrk, KAPWR_KEY);

	/* Force all 8xx processors to use divide by 16 processor clock. */
	clk_r2 = immr_map(im_clkrst);
	setbits32(&clk_r2->car_sccr, 0x02000000);
	immr_unmap(clk_r2);
	setbits32(&mpc8xx_immr->im_clkrst.car_sccr, 0x02000000);

	/* Processor frequency is MHz.
	 */
@@ -123,14 +110,12 @@ void __init mpc8xx_calibrate_decr(void)
	 * we guarantee the registers are locked, then we unlock them
	 * for our use.
	 */
	sys_tmr1 = immr_map(im_sitk);
	out_be32(&sys_tmr1->sitk_tbscrk, ~KAPWR_KEY);
	out_be32(&sys_tmr1->sitk_rtcsck, ~KAPWR_KEY);
	out_be32(&sys_tmr1->sitk_tbk, ~KAPWR_KEY);
	out_be32(&sys_tmr1->sitk_tbscrk, KAPWR_KEY);
	out_be32(&sys_tmr1->sitk_rtcsck, KAPWR_KEY);
	out_be32(&sys_tmr1->sitk_tbk, KAPWR_KEY);
	immr_unmap(sys_tmr1);
	out_be32(&mpc8xx_immr->im_sitk.sitk_tbscrk, ~KAPWR_KEY);
	out_be32(&mpc8xx_immr->im_sitk.sitk_rtcsck, ~KAPWR_KEY);
	out_be32(&mpc8xx_immr->im_sitk.sitk_tbk, ~KAPWR_KEY);
	out_be32(&mpc8xx_immr->im_sitk.sitk_tbscrk, KAPWR_KEY);
	out_be32(&mpc8xx_immr->im_sitk.sitk_rtcsck, KAPWR_KEY);
	out_be32(&mpc8xx_immr->im_sitk.sitk_tbk, KAPWR_KEY);

	init_internal_rtc();

@@ -144,10 +129,8 @@ void __init mpc8xx_calibrate_decr(void)
	of_node_put(cpu);
	irq = virq_to_hw(virq);

	sys_tmr2 = immr_map(im_sit);
	out_be16(&sys_tmr2->sit_tbscr, ((1 << (7 - (irq/2))) << 8) |
					(TBSCR_TBF | TBSCR_TBE));
	immr_unmap(sys_tmr2);
	out_be16(&mpc8xx_immr->im_sit.sit_tbscr,
		 ((1 << (7 - (irq / 2))) << 8) | (TBSCR_TBF | TBSCR_TBE));

	if (request_irq(virq, timebase_interrupt, IRQF_NO_THREAD, "tbint",
			NULL))
@@ -161,47 +144,36 @@ void __init mpc8xx_calibrate_decr(void)

int mpc8xx_set_rtc_time(struct rtc_time *tm)
{
	sitk8xx_t __iomem *sys_tmr1;
	sit8xx_t __iomem *sys_tmr2;
	time64_t time;

	sys_tmr1 = immr_map(im_sitk);
	sys_tmr2 = immr_map(im_sit);
	time = rtc_tm_to_time64(tm);

	out_be32(&sys_tmr1->sitk_rtck, KAPWR_KEY);
	out_be32(&sys_tmr2->sit_rtc, (u32)time);
	out_be32(&sys_tmr1->sitk_rtck, ~KAPWR_KEY);
	out_be32(&mpc8xx_immr->im_sitk.sitk_rtck, KAPWR_KEY);
	out_be32(&mpc8xx_immr->im_sit.sit_rtc, (u32)time);
	out_be32(&mpc8xx_immr->im_sitk.sitk_rtck, ~KAPWR_KEY);

	immr_unmap(sys_tmr2);
	immr_unmap(sys_tmr1);
	return 0;
}

void mpc8xx_get_rtc_time(struct rtc_time *tm)
{
	unsigned long data;
	sit8xx_t __iomem *sys_tmr = immr_map(im_sit);

	/* Get time from the RTC. */
	data = in_be32(&sys_tmr->sit_rtc);
	data = in_be32(&mpc8xx_immr->im_sit.sit_rtc);
	rtc_time64_to_tm(data, tm);
	immr_unmap(sys_tmr);
	return;
}

void __noreturn mpc8xx_restart(char *cmd)
{
	car8xx_t __iomem *clk_r = immr_map(im_clkrst);


	local_irq_disable();

	setbits32(&clk_r->car_plprcr, 0x00000080);
	setbits32(&mpc8xx_immr->im_clkrst.car_plprcr, 0x00000080);
	/* Clear the ME bit in MSR to cause checkstop on machine check
	*/
	mtmsr(mfmsr() & ~0x1000);

	in_8(&clk_r->res[0]);
	in_8(&mpc8xx_immr->im_clkrst.res[0]);
	panic("Restart failed\n");
}