Commit f90bebb3 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge tag 'peci-next-6.6-rc1' of... 

Merge tag 'peci-next-6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/iwi/linux into char-misc-next

Iwona writes:

Update peci-next for v6.6-rc1

* Add Intel Sapphire Rapids support.
* Add Nuvoton controller driver.

* tag 'peci-next-6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/iwi/linux:
  arm64: dts: nuvoton: Add PECI controller node
  ARM: dts: nuvoton: Add PECI controller node
  peci: Add peci-npcm controller driver
  dt-bindings: Add bindings for peci-npcm
  hwmon: (peci/dimmtemp) Add Sapphire Rapids support
  hwmon: (peci/cputemp) Add Intel Sapphire Rapids support
  peci: cpu: Add Intel Sapphire Rapids support
parents abe8ff43 d7c99890

Documentation/devicetree/bindings/peci/nuvoton,npcm-peci.yaml

0 → 100644
+56 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/peci/nuvoton,npcm-peci.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Nuvoton PECI Bus



maintainers:

  - Tomer Maimon <tmaimon77@gmail.com>



allOf:

  - $ref: peci-controller.yaml#



properties:

  compatible:

    enum:

      - nuvoton,npcm750-peci

      - nuvoton,npcm845-peci



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    description:

      Clock source for PECI controller. Should reference the APB clock.

    maxItems: 1



  cmd-timeout-ms:

    minimum: 1

    maximum: 1000

    default: 1000



required:

  - compatible

  - reg

  - interrupts

  - clocks



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    peci-controller@f0100000 {

      compatible = "nuvoton,npcm750-peci";

      reg = <0xf0100000 0x200>;

      interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;

      clocks = <&clk NPCM7XX_CLK_APB3>;

      cmd-timeout-ms = <1000>;

    };

...

arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi

+9 −0
Original line number Diff line number Diff line
@@ -220,6 +220,15 @@ 
				};

			};



			peci: peci-controller@f0100000 {

				compatible = "nuvoton,npcm750-peci";

				reg = <0xf0100000 0x200>;

				interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clk NPCM7XX_CLK_APB3>;

				cmd-timeout-ms = <1000>;

				status = "disabled";

			};



			spi0: spi@200000 {

				compatible = "nuvoton,npcm750-pspi";

				reg = <0x200000 0x1000>;

arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi

+9 −0
Original line number Diff line number Diff line
@@ -68,6 +68,15 @@ 
			ranges = <0x0 0x0 0xf0000000 0x00300000>,

				<0xfff00000 0x0 0xfff00000 0x00016000>;



			peci: peci-controller@100000 {

				compatible = "nuvoton,npcm845-peci";

				reg = <0x100000 0x1000>;

				interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;

				clocks = <&clk NPCM8XX_CLK_APB3>;

				cmd-timeout-ms = <1000>;

				status = "disabled";

			};



			timer0: timer@8000 {

				compatible = "nuvoton,npcm845-timer";

				interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;

drivers/hwmon/peci/cputemp.c

+18 −0
Original line number Diff line number Diff line
@@ -363,6 +363,7 @@ static int init_core_mask(struct peci_cputemp *priv) 
	switch (peci_dev->info.model) {

	case INTEL_FAM6_ICELAKE_X:

	case INTEL_FAM6_ICELAKE_D:

	case INTEL_FAM6_SAPPHIRERAPIDS_X:

		ret = peci_ep_pci_local_read(peci_dev, 0, reg->bus, reg->dev,

					     reg->func, reg->offset + 4, &data);

		if (ret)
@@ -531,6 +532,13 @@ static struct resolved_cores_reg resolved_cores_reg_icx = { 
	.offset = 0xd0,

};



static struct resolved_cores_reg resolved_cores_reg_spr = {

	.bus = 31,

	.dev = 30,

	.func = 6,

	.offset = 0x80,

};



static const struct cpu_info cpu_hsx = {

	.reg		= &resolved_cores_reg_hsx,

	.min_peci_revision = 0x33,
@@ -549,6 +557,12 @@ static const struct cpu_info cpu_icx = { 
	.thermal_margin_to_millidegree = &dts_ten_dot_six_to_millidegree,

};



static const struct cpu_info cpu_spr = {

	.reg		= &resolved_cores_reg_spr,

	.min_peci_revision = 0x40,

	.thermal_margin_to_millidegree = &dts_ten_dot_six_to_millidegree,

};



static const struct auxiliary_device_id peci_cputemp_ids[] = {

	{

		.name = "peci_cpu.cputemp.hsx",
@@ -574,6 +588,10 @@ static const struct auxiliary_device_id peci_cputemp_ids[] = { 
		.name = "peci_cpu.cputemp.icxd",

		.driver_data = (kernel_ulong_t)&cpu_icx,

	},

	{

		.name = "peci_cpu.cputemp.spr",

		.driver_data = (kernel_ulong_t)&cpu_spr,

	},

	{ }

};

MODULE_DEVICE_TABLE(auxiliary, peci_cputemp_ids);

drivers/hwmon/peci/dimmtemp.c

+50 −0
Original line number Diff line number Diff line
@@ -30,6 +30,8 @@ 
#define DIMM_IDX_MAX_ON_ICX	2

#define CHAN_RANK_MAX_ON_ICXD	4

#define DIMM_IDX_MAX_ON_ICXD	2

#define CHAN_RANK_MAX_ON_SPR	8

#define DIMM_IDX_MAX_ON_SPR	2



#define CHAN_RANK_MAX		CHAN_RANK_MAX_ON_HSX

#define DIMM_IDX_MAX		DIMM_IDX_MAX_ON_HSX
@@ -530,6 +532,43 @@ read_thresholds_icx(struct peci_dimmtemp *priv, int dimm_order, int chan_rank, u 
	return 0;

}



static int

read_thresholds_spr(struct peci_dimmtemp *priv, int dimm_order, int chan_rank, u32 *data)

{

	u32 reg_val;

	u64 offset;

	int ret;

	u8 dev;



	ret = peci_ep_pci_local_read(priv->peci_dev, 0, 30, 0, 2, 0xd4, &reg_val);

	if (ret || !(reg_val & BIT(31)))

		return -ENODATA; /* Use default or previous value */



	ret = peci_ep_pci_local_read(priv->peci_dev, 0, 30, 0, 2, 0xd0, &reg_val);

	if (ret)

		return -ENODATA; /* Use default or previous value */



	/*

	 * Device 26, Offset 219a8: IMC 0 channel 0 -> rank 0

	 * Device 26, Offset 299a8: IMC 0 channel 1 -> rank 1

	 * Device 27, Offset 219a8: IMC 1 channel 0 -> rank 2

	 * Device 27, Offset 299a8: IMC 1 channel 1 -> rank 3

	 * Device 28, Offset 219a8: IMC 2 channel 0 -> rank 4

	 * Device 28, Offset 299a8: IMC 2 channel 1 -> rank 5

	 * Device 29, Offset 219a8: IMC 3 channel 0 -> rank 6

	 * Device 29, Offset 299a8: IMC 3 channel 1 -> rank 7

	 */

	dev = 26 + chan_rank / 2;

	offset = 0x219a8 + dimm_order * 4 + (chan_rank % 2) * 0x8000;



	ret = peci_mmio_read(priv->peci_dev, 0, GET_CPU_SEG(reg_val), GET_CPU_BUS(reg_val),

			     dev, 0, offset, data);

	if (ret)

		return ret;



	return 0;

}



static const struct dimm_info dimm_hsx = {

	.chan_rank_max	= CHAN_RANK_MAX_ON_HSX,

	.dimm_idx_max	= DIMM_IDX_MAX_ON_HSX,
@@ -572,6 +611,13 @@ static const struct dimm_info dimm_icxd = { 
	.read_thresholds = &read_thresholds_icx,

};



static const struct dimm_info dimm_spr = {

	.chan_rank_max	= CHAN_RANK_MAX_ON_SPR,

	.dimm_idx_max	= DIMM_IDX_MAX_ON_SPR,

	.min_peci_revision = 0x40,

	.read_thresholds = &read_thresholds_spr,

};



static const struct auxiliary_device_id peci_dimmtemp_ids[] = {

	{

		.name = "peci_cpu.dimmtemp.hsx",
@@ -597,6 +643,10 @@ static const struct auxiliary_device_id peci_dimmtemp_ids[] = { 
		.name = "peci_cpu.dimmtemp.icxd",

		.driver_data = (kernel_ulong_t)&dimm_icxd,

	},

	{

		.name = "peci_cpu.dimmtemp.spr",

		.driver_data = (kernel_ulong_t)&dimm_spr,

	},

	{ }

};

MODULE_DEVICE_TABLE(auxiliary, peci_dimmtemp_ids);