Commit f8f62118 authored by Will Deacon's avatar Will Deacon
Browse files

Merge branch 'for-next/perf' into for-next/core 

* for-next/perf:
  drivers/perf: hisi: Update HiSilicon PMU maintainers
  arm_pmu: acpi: Add a representative platform device for TRBE
  arm_pmu: acpi: Refactor arm_spe_acpi_register_device()
  hw_breakpoint: fix single-stepping when using bpf_overflow_handler
  perf/imx_ddr: don't enable counter0 if none of 4 counters are used
  perf/imx_ddr: speed up overflow frequency of cycle
  drivers/perf: hisi: Schedule perf session according to locality
  perf/arm-dmc620: Fix dmc620_pmu_irqs_lock/cpu_hotplug_lock circular lock dependency
  perf/smmuv3: Add MODULE_ALIAS for module auto loading
  perf/smmuv3: Enable HiSilicon Erratum 162001900 quirk for HIP08/09
  perf: pmuv3: Remove comments from armv8pmu_[enable|disable]_event()
  perf/arm-cmn: Add CMN-700 r3 support
  perf/arm-cmn: Refactor HN-F event selector macros
  perf/arm-cmn: Remove spurious event aliases
  drivers/perf: Explicitly include correct DT includes
  perf: pmuv3: Add Cortex A520, A715, A720, X3 and X4 PMUs
  dt-bindings: arm: pmu: Add Cortex A520, A715, A720, X3, and X4
  perf/smmuv3: Remove build dependency on ACPI
  perf: xgene_pmu: Convert to devm_platform_ioremap_resource()
  driver/perf: Add identifier sysfs file for Yitian 710 DDR
parents 7abb3e4e 21b61fe4

Documentation/arch/arm64/silicon-errata.rst

+3 −0
Original line number Diff line number Diff line
@@ -195,6 +195,9 @@ stable kernels. 
+----------------+-----------------+-----------------+-----------------------------+

| Hisilicon      | Hip08 SMMU PMCG | #162001800      | N/A                         |

+----------------+-----------------+-----------------+-----------------------------+

| Hisilicon      | Hip08 SMMU PMCG | #162001900      | N/A                         |

|                | Hip09 SMMU PMCG |                 |                             |

+----------------+-----------------+-----------------+-----------------------------+

+----------------+-----------------+-----------------+-----------------------------+

| Qualcomm Tech. | Kryo/Falkor v1  | E1003           | QCOM_FALKOR_ERRATUM_1003    |

+----------------+-----------------+-----------------+-----------------------------+

Documentation/devicetree/bindings/arm/pmu.yaml

+5 −0
Original line number Diff line number Diff line
@@ -49,9 +49,14 @@ properties: 
          - arm,cortex-a77-pmu

          - arm,cortex-a78-pmu

          - arm,cortex-a510-pmu

          - arm,cortex-a520-pmu

          - arm,cortex-a710-pmu

          - arm,cortex-a715-pmu

          - arm,cortex-a720-pmu

          - arm,cortex-x1-pmu

          - arm,cortex-x2-pmu

          - arm,cortex-x3-pmu

          - arm,cortex-x4-pmu

          - arm,neoverse-e1-pmu

          - arm,neoverse-n1-pmu

          - arm,neoverse-n2-pmu

MAINTAINERS

+2 −2
Original line number Diff line number Diff line
@@ -9306,7 +9306,7 @@ F: drivers/crypto/hisilicon/hpre/hpre_crypto.c 
F:	drivers/crypto/hisilicon/hpre/hpre_main.c









HISILICON HNS3 PMU DRIVER









M:	Guangbin Huang <huangguangbin2@huawei.com>









M:	Jijie Shao <shaojijie@huawei.com>









S:	Supported









F:	Documentation/admin-guide/perf/hns3-pmu.rst









F:	drivers/perf/hisilicon/hns3_pmu.c








@@ -9344,7 +9344,7 @@ F:	Documentation/devicetree/bindings/net/hisilicon*.txt







F:	drivers/net/ethernet/hisilicon/

















HISILICON PMU DRIVER









M:	Shaokun Zhang <zhangshaokun@hisilicon.com>









M:	Yicong Yang <yangyicong@hisilicon.com>









M:	Jonathan Cameron <jonathan.cameron@huawei.com>









S:	Supported









W:	http://www.hisilicon.com
































arch/arm/kernel/hw_breakpoint.c



+4
−4






























Original line number
Diff line number
Diff line







@@ -626,7 +626,7 @@ int hw_breakpoint_arch_parse(struct perf_event *bp,







	hw->address &= ~alignment_mask;









	hw->ctrl.len <<= offset;



















	if (is_default_overflow_handler(bp)) {









	if (uses_default_overflow_handler(bp)) {









		/*









		 * Mismatch breakpoints are required for single-stepping









		 * breakpoints.








@@ -798,7 +798,7 @@ static void watchpoint_handler(unsigned long addr, unsigned int fsr,







		 * Otherwise, insert a temporary mismatch breakpoint so that









		 * we can single-step over the watchpoint trigger.









		 */









		if (!is_default_overflow_handler(wp))









		if (!uses_default_overflow_handler(wp))









			continue;









step:









		enable_single_step(wp, instruction_pointer(regs));








@@ -811,7 +811,7 @@ static void watchpoint_handler(unsigned long addr, unsigned int fsr,







		info->trigger = addr;









		pr_debug("watchpoint fired: address = 0x%x\n", info->trigger);









		perf_bp_event(wp, regs);









		if (is_default_overflow_handler(wp))









		if (uses_default_overflow_handler(wp))









			enable_single_step(wp, instruction_pointer(regs));









	}


















@@ -886,7 +886,7 @@ static void breakpoint_handler(unsigned long unknown, struct pt_regs *regs)







			info->trigger = addr;









			pr_debug("breakpoint fired: address = 0x%x\n", addr);









			perf_bp_event(bp, regs);









			if (is_default_overflow_handler(bp))









			if (uses_default_overflow_handler(bp))









				enable_single_step(bp, addr);









			goto unlock;









		}
































arch/arm64/include/asm/acpi.h



+3
−0






























Original line number
Diff line number
Diff line







@@ -42,6 +42,9 @@







#define ACPI_MADT_GICC_SPE  (offsetof(struct acpi_madt_generic_interrupt, \









	spe_interrupt) + sizeof(u16))



















#define ACPI_MADT_GICC_TRBE  (offsetof(struct acpi_madt_generic_interrupt, \









	trbe_interrupt) + sizeof(u16))



















/* Basic configuration for ACPI */









#ifdef	CONFIG_ACPI









pgprot_t __acpi_get_mem_attribute(phys_addr_t addr);