Commit f8075c1c authored by Sakari Ailus's avatar Sakari Ailus Committed by Mauro Carvalho Chehab
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media: v4l: fwnode: C-PHY has no clock lane



C-PHY doesn't use a clock lane, hence the test for the clock lane when
there isn't one is faulty. Rework the test for the conflicting clock lane.

Signed-off-by: default avatarSakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+samsung@kernel.org>
parent d7ac8b1b
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+4 −4
Original line number Diff line number Diff line
@@ -212,8 +212,8 @@ static int v4l2_fwnode_endpoint_parse_csi2_bus(struct fwnode_handle *fwnode,
		have_clk_lane = true;
	}

	if (lanes_used & BIT(clock_lane)) {
		if (have_clk_lane || !use_default_lane_mapping)
	if (have_clk_lane && lanes_used & BIT(clock_lane) &&
	    !use_default_lane_mapping) {
		pr_warn("duplicated lane %u in clock-lanes, using defaults\n",
			v);
		use_default_lane_mapping = true;