Commit f6d790e5 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-fixes-2022-03-10' of... 

Merge tag 'drm-intel-next-fixes-2022-03-10' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-next

- Reduce overzealous alignment constraints for GGTT
- Add missing mdev attribute "name" for GVT
- Async flip fixes (Ville)
- Static checker fix (Ville)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/YimvoLOZ8RPKrITv@jlahtine-mobl.ger.corp.intel.com
parents 955ad0c8 5e7f44b5

drivers/gpu/drm/i915/display/intel_atomic.c

+1 −0
Original line number Diff line number Diff line
@@ -262,6 +262,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc) 
	crtc_state->preload_luts = false;

	crtc_state->inherited = false;

	crtc_state->wm.need_postvbl_update = false;

	crtc_state->do_async_flip = false;

	crtc_state->fb_bits = 0;

	crtc_state->update_planes = 0;

	crtc_state->dsb = NULL;

drivers/gpu/drm/i915/display/intel_atomic_plane.c

+3 −4
Original line number Diff line number Diff line
@@ -110,7 +110,6 @@ intel_plane_duplicate_state(struct drm_plane *plane) 
	intel_state->ggtt_vma = NULL;

	intel_state->dpt_vma = NULL;

	intel_state->flags = 0;

	intel_state->do_async_flip = false;



	/* add reference to fb */

	if (intel_state->hw.fb)
@@ -506,7 +505,7 @@ static int intel_plane_atomic_calc_changes(const struct intel_crtc_state *old_cr 
		new_crtc_state->disable_lp_wm = true;



	if (intel_plane_do_async_flip(plane, old_crtc_state, new_crtc_state))

		new_plane_state->do_async_flip = true;

		new_crtc_state->do_async_flip = true;



	return 0;

}
@@ -678,7 +677,7 @@ void intel_plane_update_arm(struct intel_plane *plane, 


	trace_intel_plane_update_arm(&plane->base, crtc);



	if (plane_state->do_async_flip)

	if (crtc_state->do_async_flip && plane->async_flip)

		plane->async_flip(plane, crtc_state, plane_state, true);

	else

		plane->update_arm(plane, crtc_state, plane_state);
@@ -703,7 +702,7 @@ void intel_crtc_planes_update_noarm(struct intel_atomic_state *state, 
	struct intel_plane *plane;

	int i;



	if (new_crtc_state->uapi.async_flip)

	if (new_crtc_state->do_async_flip)

		return;



	/*

drivers/gpu/drm/i915/display/intel_crtc.c

+2 −2
Original line number Diff line number Diff line
@@ -485,7 +485,7 @@ void intel_pipe_update_start(struct intel_crtc_state *new_crtc_state) 
		intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI);

	DEFINE_WAIT(wait);



	if (new_crtc_state->uapi.async_flip)

	if (new_crtc_state->do_async_flip)

		return;



	if (intel_crtc_needs_vblank_work(new_crtc_state))
@@ -630,7 +630,7 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) 
	ktime_t end_vbl_time = ktime_get();

	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);



	if (new_crtc_state->uapi.async_flip)

	if (new_crtc_state->do_async_flip)

		return;



	trace_intel_pipe_update_end(crtc, end_vbl_count, scanline_end);

drivers/gpu/drm/i915/display/intel_display.c

+98 −24
Original line number Diff line number Diff line
@@ -346,7 +346,10 @@ static enum pipe bigjoiner_master_pipe(const struct intel_crtc_state *crtc_state 


u8 intel_crtc_bigjoiner_slave_pipes(const struct intel_crtc_state *crtc_state)

{

	if (crtc_state->bigjoiner_pipes)

		return crtc_state->bigjoiner_pipes & ~BIT(bigjoiner_master_pipe(crtc_state));

	else

		return 0;

}



bool intel_crtc_is_bigjoiner_slave(const struct intel_crtc_state *crtc_state)
@@ -1260,10 +1263,8 @@ static void intel_crtc_enable_flip_done(struct intel_atomic_state *state, 
	int i;



	for_each_new_intel_plane_in_state(state, plane, plane_state, i) {

		if (plane->enable_flip_done &&

		    plane->pipe == crtc->pipe &&

		    update_planes & BIT(plane->id) &&

		    plane_state->do_async_flip)

		if (plane->pipe == crtc->pipe &&

		    update_planes & BIT(plane->id))

			plane->enable_flip_done(plane);

	}

}
@@ -1279,10 +1280,8 @@ static void intel_crtc_disable_flip_done(struct intel_atomic_state *state, 
	int i;



	for_each_new_intel_plane_in_state(state, plane, plane_state, i) {

		if (plane->disable_flip_done &&

		    plane->pipe == crtc->pipe &&

		    update_planes & BIT(plane->id) &&

		    plane_state->do_async_flip)

		if (plane->pipe == crtc->pipe &&

		    update_planes & BIT(plane->id))

			plane->disable_flip_done(plane);

	}

}
@@ -7398,7 +7397,7 @@ static void kill_bigjoiner_slave(struct intel_atomic_state *state, 
 * Correspondingly, support is currently added for primary plane only.

 *

 * Async flip can only change the plane surface address, so anything else

 * changing is rejected from the intel_atomic_check_async() function.

 * changing is rejected from the intel_async_flip_check_hw() function.

 * Once this check is cleared, flip done interrupt is enabled using

 * the intel_crtc_enable_flip_done() function.

 *
@@ -7408,7 +7407,65 @@ static void kill_bigjoiner_slave(struct intel_atomic_state *state, 
 * correspond to the last vblank and have no relation to the actual time when

 * the flip done event was sent.

 */

static int intel_atomic_check_async(struct intel_atomic_state *state, struct intel_crtc *crtc)

static int intel_async_flip_check_uapi(struct intel_atomic_state *state,

				       struct intel_crtc *crtc)

{

	struct drm_i915_private *i915 = to_i915(state->base.dev);

	const struct intel_crtc_state *new_crtc_state =

		intel_atomic_get_new_crtc_state(state, crtc);

	const struct intel_plane_state *old_plane_state;

	struct intel_plane_state *new_plane_state;

	struct intel_plane *plane;

	int i;



	if (!new_crtc_state->uapi.async_flip)

		return 0;



	if (!new_crtc_state->uapi.active) {

		drm_dbg_kms(&i915->drm,

			    "[CRTC:%d:%s] not active\n",

			    crtc->base.base.id, crtc->base.name);

		return -EINVAL;

	}



	if (intel_crtc_needs_modeset(new_crtc_state)) {

		drm_dbg_kms(&i915->drm,

			    "[CRTC:%d:%s] modeset required\n",

			    crtc->base.base.id, crtc->base.name);

		return -EINVAL;

	}



	for_each_oldnew_intel_plane_in_state(state, plane, old_plane_state,

					     new_plane_state, i) {

		if (plane->pipe != crtc->pipe)

			continue;



		/*

		 * TODO: Async flip is only supported through the page flip IOCTL

		 * as of now. So support currently added for primary plane only.

		 * Support for other planes on platforms on which supports

		 * this(vlv/chv and icl+) should be added when async flip is

		 * enabled in the atomic IOCTL path.

		 */

		if (!plane->async_flip) {

			drm_dbg_kms(&i915->drm,

				    "[PLANE:%d:%s] async flip not supported\n",

				    plane->base.base.id, plane->base.name);

			return -EINVAL;

		}



		if (!old_plane_state->uapi.fb || !new_plane_state->uapi.fb) {

			drm_dbg_kms(&i915->drm,

				    "[PLANE:%d:%s] no old or new framebuffer\n",

				    plane->base.base.id, plane->base.name);

			return -EINVAL;

		}

	}



	return 0;

}



static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct intel_crtc *crtc)

{

	struct drm_i915_private *i915 = to_i915(state->base.dev);

	const struct intel_crtc_state *old_crtc_state, *new_crtc_state;
@@ -7419,6 +7476,9 @@ static int intel_atomic_check_async(struct intel_atomic_state *state, struct int 
	old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc);

	new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc);



	if (!new_crtc_state->uapi.async_flip)

		return 0;



	if (intel_crtc_needs_modeset(new_crtc_state)) {

		drm_dbg_kms(&i915->drm, "Modeset Required. Async flip not supported\n");

		return -EINVAL;
@@ -7440,15 +7500,25 @@ static int intel_atomic_check_async(struct intel_atomic_state *state, struct int 
			continue;



		/*

		 * TODO: Async flip is only supported through the page flip IOCTL

		 * as of now. So support currently added for primary plane only.

		 * Support for other planes on platforms on which supports

		 * this(vlv/chv and icl+) should be added when async flip is

		 * enabled in the atomic IOCTL path.

		 * Only async flip capable planes should be in the state

		 * if we're really about to ask the hardware to perform

		 * an async flip. We should never get this far otherwise.

		 */

		if (!plane->async_flip)

		if (drm_WARN_ON(&i915->drm,

				new_crtc_state->do_async_flip && !plane->async_flip))

			return -EINVAL;



		/*

		 * Only check async flip capable planes other planes

		 * may be involved in the initial commit due to

		 * the wm0/ddb optimization.

		 *

		 * TODO maybe should track which planes actually

		 * were requested to do the async flip...

		 */

		if (!plane->async_flip)

			continue;



		/*

		 * FIXME: This check is kept generic for all platforms.

		 * Need to verify this for all gen9 platforms to enable
@@ -7613,6 +7683,12 @@ static int intel_atomic_check(struct drm_device *dev, 
	if (ret)

		goto fail;



	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

		ret = intel_async_flip_check_uapi(state, crtc);

		if (ret)

			return ret;

	}



	ret = intel_bigjoiner_add_affected_crtcs(state);

	if (ret)

		goto fail;
@@ -7769,11 +7845,9 @@ static int intel_atomic_check(struct drm_device *dev, 


	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,

					    new_crtc_state, i) {

		if (new_crtc_state->uapi.async_flip) {

			ret = intel_atomic_check_async(state, crtc);

		ret = intel_async_flip_check_hw(state, crtc);

		if (ret)

			goto fail;

		}



		if (!intel_crtc_needs_modeset(new_crtc_state) &&

		    !new_crtc_state->update_pipe)
@@ -8395,7 +8469,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) 
	intel_dbuf_pre_plane_update(state);



	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

		if (new_crtc_state->uapi.async_flip)

		if (new_crtc_state->do_async_flip)

			intel_crtc_enable_flip_done(state, crtc);

	}
@@ -8421,7 +8495,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) 
	drm_atomic_helper_wait_for_flip_done(dev, &state->base);



	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {

		if (new_crtc_state->uapi.async_flip)

		if (new_crtc_state->do_async_flip)

			intel_crtc_disable_flip_done(state, crtc);

	}

drivers/gpu/drm/i915/display/intel_display_types.h

+3 −3
Original line number Diff line number Diff line
@@ -613,9 +613,6 @@ struct intel_plane_state { 


	struct intel_fb_view view;



	/* Indicates if async flip is required */

	bool do_async_flip;



	/* Plane pxp decryption state */

	bool decrypt;
@@ -951,6 +948,9 @@ struct intel_crtc_state { 
	bool preload_luts;

	bool inherited; /* state inherited from BIOS? */



	/* Ask the hardware to actually async flip? */

	bool do_async_flip;



	/* Pipe source size (ie. panel fitter input size)

	 * All planes will be positioned inside this space,

	 * and get clipped at the edges. */