Commit f5fc22cb authored by Horatiu Vultur's avatar Horatiu Vultur Committed by Claudiu Beznea
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ARM: dts: lan966x: Fix the interrupt number for internal PHYs



According to the datasheet the interrupts for internal PHYs are
80 and 81.

Fixes: 6ad69e07 ("ARM: dts: lan966x: add MIIM nodes")
Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220912192629.461452-1-horatiu.vultur@microchip.com
parent 3d074b75
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+2 −2
Original line number Diff line number Diff line
@@ -541,13 +541,13 @@

			phy0: ethernet-phy@1 {
				reg = <1>;
				interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
				interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
				status = "disabled";
			};

			phy1: ethernet-phy@2 {
				reg = <2>;
				interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
				interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
				status = "disabled";
			};
		};