Commit f5208672 authored by Sameer Pujar's avatar Sameer Pujar Committed by Thierry Reding
Browse files

arm64: tegra: Audio graph header for Tegra210 



Expose a header which describes DT bindings required to use audio-graph
based sound card. All Tegra210 based platforms can include this header
and add platform specific information. Currently, from SoC point of view,
all links are exposed for ADMAIF, AHUB, I2S and DMIC components.

Signed-off-by: default avatarSameer Pujar <spujar@nvidia.com>
Reviewed-by: default avatarJon Hunter <jonathanh@nvidia.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 38254d19

arch/arm64/boot/dts/nvidia/tegra210.dtsi

+182 −0
Original line number Diff line number Diff line
@@ -1453,6 +1453,91 @@ 
					    "rx9",  "tx9",

					    "rx10", "tx10";

				status = "disabled";



				ports {

					#address-cells = <1>;

					#size-cells = <0>;



					admaif1_port: port@0 {

						reg = <0>;



						admaif1_ep: endpoint {

							remote-endpoint = <&xbar_admaif1_ep>;

						};

					};



					admaif2_port: port@1 {

						reg = <1>;



						admaif2_ep: endpoint {

							remote-endpoint = <&xbar_admaif2_ep>;

						};

					};



					admaif3_port: port@2 {

						reg = <2>;



						admaif3_ep: endpoint {

							remote-endpoint = <&xbar_admaif3_ep>;

						};

					};



					admaif4_port: port@3 {

						reg = <3>;



						admaif4_ep: endpoint {

							remote-endpoint = <&xbar_admaif4_ep>;

						};

					};



					admaif5_port: port@4 {

						reg = <4>;



						admaif5_ep: endpoint {

							remote-endpoint = <&xbar_admaif5_ep>;

						};

					};



					admaif6_port: port@5 {

						reg = <5>;



						admaif6_ep: endpoint {

							remote-endpoint = <&xbar_admaif6_ep>;

						};

					};



					admaif7_port: port@6 {

						reg = <6>;



						admaif7_ep: endpoint {

							remote-endpoint = <&xbar_admaif7_ep>;

						};

					};



					admaif8_port: port@7 {

						reg = <7>;



						admaif8_ep: endpoint {

							remote-endpoint = <&xbar_admaif8_ep>;

						};

					};



					admaif9_port: port@8 {

						reg = <8>;



						admaif9_ep: endpoint {

							remote-endpoint = <&xbar_admaif9_ep>;

						};

					};



					admaif10_port: port@9 {

						reg = <9>;



						admaif10_ep: endpoint {

							remote-endpoint = <&xbar_admaif10_ep>;

						};

					};

				};

			};



			tegra_i2s1: i2s@702d1000 {
@@ -1555,6 +1640,89 @@ 
				sound-name-prefix = "DMIC3";

				status = "disabled";

			};



			ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@0 {

					reg = <0x0>;



					xbar_admaif1_ep: endpoint {

						remote-endpoint = <&admaif1_ep>;

					};

				};



				port@1 {

					reg = <0x1>;



					xbar_admaif2_ep: endpoint {

						remote-endpoint = <&admaif2_ep>;

					};

				};



				port@2 {

					reg = <0x2>;



					xbar_admaif3_ep: endpoint {

						remote-endpoint = <&admaif3_ep>;

					};

				};



				port@3 {

					reg = <0x3>;



					xbar_admaif4_ep: endpoint {

						remote-endpoint = <&admaif4_ep>;

					};

				};



				port@4 {

					reg = <0x4>;

					xbar_admaif5_ep: endpoint {

						remote-endpoint = <&admaif5_ep>;

					};

				};

				port@5 {

					reg = <0x5>;



					xbar_admaif6_ep: endpoint {

						remote-endpoint = <&admaif6_ep>;

					};

				};



				port@6 {

					reg = <0x6>;



					xbar_admaif7_ep: endpoint {

						remote-endpoint = <&admaif7_ep>;

					};

				};



				port@7 {

					reg = <0x7>;



					xbar_admaif8_ep: endpoint {

						remote-endpoint = <&admaif8_ep>;

					};

				};



				port@8 {

					reg = <0x8>;



					xbar_admaif9_ep: endpoint {

						remote-endpoint = <&admaif9_ep>;

					};

				};



				port@9 {

					reg = <0x9>;



					xbar_admaif10_ep: endpoint {

						remote-endpoint = <&admaif10_ep>;

					};

				};

			};

		};

	};
@@ -1720,6 +1888,20 @@ 
				      &{/cpus/cpu@2} &{/cpus/cpu@3}>;

	};



	sound {

		status = "disabled";



		clocks = <&tegra_car TEGRA210_CLK_PLL_A>,

			 <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;

		clock-names = "pll_a", "plla_out0";



		assigned-clocks = <&tegra_car TEGRA210_CLK_PLL_A>,

				  <&tegra_car TEGRA210_CLK_PLL_A_OUT0>,

				  <&tegra_car TEGRA210_CLK_EXTERN1>;

		assigned-clock-parents = <0>, <0>, <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;

		assigned-clock-rates = <368640000>, <49152000>, <12288000>;

	};



	thermal-zones {

		cpu {

			polling-delay-passive = <1000>;