Commit f48fd50b authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

fbdev: remove s3c2410 framebuffer 



The s3c24xx platform was removed, so the framebuffer driver is no longer
needed.

Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 014e79d7

drivers/video/fbdev/Kconfig

+4 −29
Original line number Diff line number Diff line
@@ -1896,19 +1896,17 @@ config FB_TMIO_ACCELL 
config FB_S3C

	tristate "Samsung S3C framebuffer support"

	depends on FB && HAVE_CLK && HAS_IOMEM

	depends on (CPU_S3C2416 || ARCH_S3C64XX) || COMPILE_TEST

	depends on ARCH_S3C64XX || COMPILE_TEST

	select FB_CFB_FILLRECT

	select FB_CFB_COPYAREA

	select FB_CFB_IMAGEBLIT

	help

	  Frame buffer driver for the built-in FB controller in the Samsung

	  SoC line from the S3C2443 onwards, including the S3C2416, S3C2450,

	  and the S3C64XX series such as the S3C6400 and S3C6410.

	  SoC line such as the S3C6400 and S3C6410.



	  These chips all have the same basic framebuffer design with the

	  actual capabilities depending on the chip. For instance the S3C6400

	  and S3C6410 support 4 hardware windows whereas the S3C24XX series

	  currently only have two.

	  actual capabilities depending on the chip. The S3C6400

	  and S3C6410 support 4 hardware windows.



	  Currently the support is only for the S3C6400 and S3C6410 SoCs.
@@ -1918,29 +1916,6 @@ config FB_S3C_DEBUG_REGWRITE 
	help

	  Show all register writes via pr_debug()



config FB_S3C2410

	tristate "S3C2410 LCD framebuffer support"

	depends on FB && ARCH_S3C24XX

	select FB_CFB_FILLRECT

	select FB_CFB_COPYAREA

	select FB_CFB_IMAGEBLIT

	help

	  Frame buffer driver for the built-in LCD controller in the Samsung

	  S3C2410 processor.



	  This driver is also available as a module ( = code which can be

	  inserted and removed from the running kernel whenever you want). The

	  module will be called s3c2410fb. If you want to compile it as a module,

	  say M here and read <file:Documentation/kbuild/modules.rst>.



	  If unsure, say N.

config FB_S3C2410_DEBUG

	bool "S3C2410 lcd debug messages"

	depends on FB_S3C2410

	help

	  Turn on debugging messages. Note that you can set/unset at run time

	  through sysfs



config FB_SM501

	tristate "Silicon Motion SM501 framebuffer support"

	depends on FB && MFD_SM501

drivers/video/fbdev/Makefile

+0 −1
Original line number Diff line number Diff line
@@ -100,7 +100,6 @@ obj-$(CONFIG_FB_S1D13XXX) += s1d13xxxfb.o 
obj-$(CONFIG_FB_SH7760)		  += sh7760fb.o

obj-$(CONFIG_FB_IMX)              += imxfb.o

obj-$(CONFIG_FB_S3C)		  += s3c-fb.o

obj-$(CONFIG_FB_S3C2410)	  += s3c2410fb.o

obj-$(CONFIG_FB_FSL_DIU)	  += fsl-diu-fb.o

obj-$(CONFIG_FB_COBALT)           += cobalt_lcdfb.o

obj-$(CONFIG_FB_IBM_GXT4500)	  += gxt4500.o

drivers/video/fbdev/s3c2410fb-regs-lcd.h

deleted100644 → 0
+0 −143
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

/*

 * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>

 *		      http://www.simtec.co.uk/products/SWLINUX/

 */



#ifndef ___ASM_ARCH_REGS_LCD_H

#define ___ASM_ARCH_REGS_LCD_H



/*

 * a couple of values are used as platform data in

 * include/linux/platform_data/fb-s3c2410.h and not

 * duplicated here.

 */

#include <linux/platform_data/fb-s3c2410.h>



#define S3C2410_LCDREG(x)	(x)



/* LCD control registers */

#define S3C2410_LCDCON1	    S3C2410_LCDREG(0x00)

#define S3C2410_LCDCON2	    S3C2410_LCDREG(0x04)

#define S3C2410_LCDCON3	    S3C2410_LCDREG(0x08)

#define S3C2410_LCDCON4	    S3C2410_LCDREG(0x0C)

#define S3C2410_LCDCON5	    S3C2410_LCDREG(0x10)



#define S3C2410_LCDCON1_CLKVAL(x)  ((x) << 8)

#define S3C2410_LCDCON1_MMODE	   (1<<7)

#define S3C2410_LCDCON1_DSCAN4	   (0<<5)

#define S3C2410_LCDCON1_STN4	   (1<<5)

#define S3C2410_LCDCON1_STN8	   (2<<5)

#define S3C2410_LCDCON1_TFT	   (3<<5)



#define S3C2410_LCDCON1_STN1BPP	   (0<<1)

#define S3C2410_LCDCON1_STN2GREY   (1<<1)

#define S3C2410_LCDCON1_STN4GREY   (2<<1)

#define S3C2410_LCDCON1_STN8BPP	   (3<<1)

#define S3C2410_LCDCON1_STN12BPP   (4<<1)



#define S3C2410_LCDCON1_ENVID	   (1)



#define S3C2410_LCDCON1_MODEMASK    0x1E



#define S3C2410_LCDCON2_VBPD(x)	    ((x) << 24)

#define S3C2410_LCDCON2_LINEVAL(x)  ((x) << 14)

#define S3C2410_LCDCON2_VFPD(x)	    ((x) << 6)

#define S3C2410_LCDCON2_VSPW(x)	    ((x) << 0)



#define S3C2410_LCDCON2_GET_VBPD(x) ( ((x) >> 24) & 0xFF)

#define S3C2410_LCDCON2_GET_VFPD(x) ( ((x) >>  6) & 0xFF)

#define S3C2410_LCDCON2_GET_VSPW(x) ( ((x) >>  0) & 0x3F)



#define S3C2410_LCDCON3_HBPD(x)	    ((x) << 19)

#define S3C2410_LCDCON3_WDLY(x)	    ((x) << 19)

#define S3C2410_LCDCON3_HOZVAL(x)   ((x) << 8)

#define S3C2410_LCDCON3_HFPD(x)	    ((x) << 0)

#define S3C2410_LCDCON3_LINEBLANK(x)((x) << 0)



#define S3C2410_LCDCON3_GET_HBPD(x) ( ((x) >> 19) & 0x7F)

#define S3C2410_LCDCON3_GET_HFPD(x) ( ((x) >>  0) & 0xFF)



/* LDCCON4 changes for STN mode on the S3C2412 */



#define S3C2410_LCDCON4_MVAL(x)	    ((x) << 8)

#define S3C2410_LCDCON4_HSPW(x)	    ((x) << 0)

#define S3C2410_LCDCON4_WLH(x)	    ((x) << 0)



#define S3C2410_LCDCON4_GET_HSPW(x) ( ((x) >>  0) & 0xFF)



/* framebuffer start addressed */

#define S3C2410_LCDSADDR1   S3C2410_LCDREG(0x14)

#define S3C2410_LCDSADDR2   S3C2410_LCDREG(0x18)

#define S3C2410_LCDSADDR3   S3C2410_LCDREG(0x1C)



#define S3C2410_LCDBANK(x)	((x) << 21)

#define S3C2410_LCDBASEU(x)	(x)



#define S3C2410_OFFSIZE(x)	((x) << 11)

#define S3C2410_PAGEWIDTH(x)	(x)



/* colour lookup and miscellaneous controls */



#define S3C2410_REDLUT	   S3C2410_LCDREG(0x20)

#define S3C2410_GREENLUT   S3C2410_LCDREG(0x24)

#define S3C2410_BLUELUT	   S3C2410_LCDREG(0x28)



#define S3C2410_DITHMODE   S3C2410_LCDREG(0x4C)

#define S3C2410_TPAL	   S3C2410_LCDREG(0x50)



#define S3C2410_TPAL_EN		(1<<24)



/* interrupt info */

#define S3C2410_LCDINTPND  S3C2410_LCDREG(0x54)

#define S3C2410_LCDSRCPND  S3C2410_LCDREG(0x58)

#define S3C2410_LCDINTMSK  S3C2410_LCDREG(0x5C)

#define S3C2410_LCDINT_FIWSEL	(1<<2)

#define	S3C2410_LCDINT_FRSYNC	(1<<1)

#define S3C2410_LCDINT_FICNT	(1<<0)



/* s3c2442 extra stn registers */



#define S3C2442_REDLUT		S3C2410_LCDREG(0x20)

#define S3C2442_GREENLUT	S3C2410_LCDREG(0x24)

#define S3C2442_BLUELUT		S3C2410_LCDREG(0x28)

#define S3C2442_DITHMODE	S3C2410_LCDREG(0x20)



#define S3C2410_LPCSEL	   S3C2410_LCDREG(0x60)



#define S3C2410_TFTPAL(x)  S3C2410_LCDREG((0x400 + (x)*4))



/* S3C2412 registers */



#define S3C2412_TPAL		S3C2410_LCDREG(0x20)



#define S3C2412_LCDINTPND	S3C2410_LCDREG(0x24)

#define S3C2412_LCDSRCPND	S3C2410_LCDREG(0x28)

#define S3C2412_LCDINTMSK	S3C2410_LCDREG(0x2C)



#define S3C2412_TCONSEL		S3C2410_LCDREG(0x30)



#define S3C2412_LCDCON6		S3C2410_LCDREG(0x34)

#define S3C2412_LCDCON7		S3C2410_LCDREG(0x38)

#define S3C2412_LCDCON8		S3C2410_LCDREG(0x3C)

#define S3C2412_LCDCON9		S3C2410_LCDREG(0x40)



#define S3C2412_REDLUT(x)	S3C2410_LCDREG(0x44 + ((x)*4))

#define S3C2412_GREENLUT(x)	S3C2410_LCDREG(0x60 + ((x)*4))

#define S3C2412_BLUELUT(x)	S3C2410_LCDREG(0x98 + ((x)*4))



#define S3C2412_FRCPAT(x)	S3C2410_LCDREG(0xB4 + ((x)*4))



/* general registers */



/* base of the LCD registers, where INTPND, INTSRC and then INTMSK

 * are available. */



#define S3C2410_LCDINTBASE	S3C2410_LCDREG(0x54)

#define S3C2412_LCDINTBASE	S3C2410_LCDREG(0x24)



#define S3C24XX_LCDINTPND	(0x00)

#define S3C24XX_LCDSRCPND	(0x04)

#define S3C24XX_LCDINTMSK	(0x08)



#endif /* ___ASM_ARCH_REGS_LCD_H */

drivers/video/fbdev/s3c2410fb.c

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File deleted.

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drivers/video/fbdev/s3c2410fb.h

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+0 −48
Original line number Diff line number Diff line 
/*

 * linux/drivers/video/s3c2410fb.h

 *	Copyright (c) 2004 Arnaud Patard

 *

 *  S3C2410 LCD Framebuffer Driver

 *

 * This file is subject to the terms and conditions of the GNU General Public

 * License.  See the file COPYING in the main directory of this archive for

 * more details.

 *

*/



#ifndef __S3C2410FB_H

#define __S3C2410FB_H



enum s3c_drv_type {

	DRV_S3C2410,

	DRV_S3C2412,

};



struct s3c2410fb_info {

	struct device		*dev;

	struct clk		*clk;



	struct resource		*mem;

	void __iomem		*io;

	void __iomem		*irq_base;



	enum s3c_drv_type	drv_type;

	struct s3c2410fb_hw	regs;



	unsigned long		clk_rate;

	unsigned int		palette_ready;



#ifdef CONFIG_ARM_S3C24XX_CPUFREQ

	struct notifier_block	freq_transition;

#endif



	/* keep these registers in case we need to re-write palette */

	u32			palette_buffer[256];

	u32			pseudo_pal[16];

};



#define PALETTE_BUFF_CLEAR (0x80000000)	/* entry is clear/invalid */



int s3c2410fb_init(void);



#endif