Commit f359a111 authored by James Hogan's avatar James Hogan
Browse files

MIPS: Separate MAAR V bit into VL and VH for XPA 



The MAAR V bit has been renamed VL since another bit called VH is added
at the top of the register when it is extended to 64-bits on a 32-bit
processor with XPA. Rename the V definition, fix the various users, and
add definitions for the VH bit. Also add a definition for the MAARI
Index field.

Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
Acked-by: default avatarRalf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
parent 4e87580e

arch/mips/include/asm/maar.h

+5 −5
Original line number Diff line number Diff line
@@ -36,7 +36,7 @@ unsigned platform_maar_init(unsigned num_pairs); 
 * @upper:	The highest address that the MAAR pair will affect. Must be

 *		aligned to one byte before a 2^16 byte boundary.

 * @attrs:	The accessibility attributes to program, eg. MIPS_MAAR_S. The

 *		MIPS_MAAR_V attribute will automatically be set.

 *		MIPS_MAAR_VL attribute will automatically be set.

 *

 * Program the pair of MAAR registers specified by idx to apply the attributes

 * specified by attrs to the range of addresses from lower to higher.
@@ -49,10 +49,10 @@ static inline void write_maar_pair(unsigned idx, phys_addr_t lower, 
	BUG_ON(((upper & 0xffff) != 0xffff)

		|| ((upper & ~0xffffull) & ~(MIPS_MAAR_ADDR << 4)));



	/* Automatically set MIPS_MAAR_V */

	attrs |= MIPS_MAAR_V;

	/* Automatically set MIPS_MAAR_VL */

	attrs |= MIPS_MAAR_VL;



	/* Write the upper address & attributes (only MIPS_MAAR_V matters) */

	/* Write the upper address & attributes (only MIPS_MAAR_VL matters) */

	write_c0_maari(idx << 1);

	back_to_back_c0_hazard();

	write_c0_maar(((upper >> 4) & MIPS_MAAR_ADDR) | attrs);
@@ -81,7 +81,7 @@ extern void maar_init(void); 
 * @upper:	The highest address that the MAAR pair will affect. Must be

 *		aligned to one byte before a 2^16 byte boundary.

 * @attrs:	The accessibility attributes to program, eg. MIPS_MAAR_S. The

 *		MIPS_MAAR_V attribute will automatically be set.

 *		MIPS_MAAR_VL attribute will automatically be set.

 *

 * Describes the configuration of a pair of Memory Accessibility Attribute

 * Registers - applying attributes from attrs to the range of physical

arch/mips/include/asm/mipsregs.h

+7 −1
Original line number Diff line number Diff line
@@ -34,8 +34,10 @@ 
 */

#ifdef __ASSEMBLY__

#define _ULCAST_

#define _U64CAST_

#else

#define _ULCAST_ (unsigned long)

#define _U64CAST_ (u64)

#endif



/*
@@ -719,10 +721,14 @@ 
#define XLR_PERFCTRL_ALLTHREADS	(_ULCAST_(1) << 13)



/* MAAR bit definitions */

#define MIPS_MAAR_VH		(_U64CAST_(1) << 63)

#define MIPS_MAAR_ADDR		((BIT_ULL(BITS_PER_LONG - 12) - 1) << 12)

#define MIPS_MAAR_ADDR_SHIFT	12

#define MIPS_MAAR_S		(_ULCAST_(1) << 1)

#define MIPS_MAAR_V		(_ULCAST_(1) << 0)

#define MIPS_MAAR_VL		(_ULCAST_(1) << 0)



/* MAARI bit definitions */

#define MIPS_MAARI_INDEX	(_ULCAST_(0x3f) << 0)



/* EBase bit definitions */

#define MIPS_EBASE_CPUNUM_SHIFT	0

arch/mips/mm/init.c

+1 −1
Original line number Diff line number Diff line
@@ -348,7 +348,7 @@ void maar_init(void) 
		upper = ((upper & MIPS_MAAR_ADDR) << 4) | 0xffff;



		pr_info("  [%d]: ", i / 2);

		if (!(attr & MIPS_MAAR_V)) {

		if (!(attr & MIPS_MAAR_VL)) {

			pr_cont("disabled\n");

			continue;

		}