Commit f2819ea1 authored by Sam Protsenko's avatar Sam Protsenko Committed by Krzysztof Kozlowski
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clk: samsung: clk-pll: Implement pll0818x PLL type 



pll0818x PLL is used in Exynos850 SoC for CMU_G3D PLL. Operation-wise,
pll0818x is the same as pll0822x. The only difference is:
  - pl0822x is integer PLL with Middle FVCO (950 to 2400 MHz)
  - pl0818x is integer PLL with Low FVCO (600 to 1200 MHz)

Add pll0818x type as an alias to pll0822x.

Reviewed-by: default avatarChanho Park <chanho61.park@samsung.com>
Signed-off-by: default avatarSam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20230223042133.26551-4-semen.protsenko@linaro.org


Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
parent ac409ada

drivers/clk/samsung/clk-pll.c

+1 −0
Original line number Diff line number Diff line
@@ -1314,6 +1314,7 @@ static void __init _samsung_clk_register_pll(struct samsung_clk_provider *ctx, 
			init.ops = &samsung_pll35xx_clk_ops;

		break;

	case pll_1417x:

	case pll_0818x:

	case pll_0822x:

		pll->enable_offs = PLL0822X_ENABLE_SHIFT;

		pll->lock_offs = PLL0822X_LOCK_STAT_SHIFT;

drivers/clk/samsung/clk-pll.h

+1 −0
Original line number Diff line number Diff line
@@ -34,6 +34,7 @@ enum samsung_pll_type { 
	pll_1451x,

	pll_1452x,

	pll_1460x,

	pll_0818x,

	pll_0822x,

	pll_0831x,

	pll_142xx,