Commit f11de861 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-fixes-2022-03-17' of... 

Merge tag 'drm-intel-next-fixes-2022-03-17' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-next

- Do not re-enable PSR after it was marked as not reliable (Jose)
- Add missing boundary check in vm_access to avoid out-of-bounds access (Mastan)
- Naming fix for HPD short pulse handling for eDP (Jose)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/YjLnofpe5sMHX7Pt@jlahtine-mobl.ger.corp.intel.com
parents f6d790e5 278da06c

drivers/gpu/drm/i915/display/intel_dp.c

+1 −1
Original line number Diff line number Diff line
@@ -4863,7 +4863,7 @@ intel_dp_hpd_pulse(struct intel_digital_port *dig_port, bool long_hpd) 
	struct intel_dp *intel_dp = &dig_port->dp;



	if (dig_port->base.type == INTEL_OUTPUT_EDP &&

	    (long_hpd || !intel_pps_have_power(intel_dp))) {

	    (long_hpd || !intel_pps_have_panel_power_or_vdd(intel_dp))) {

		/*

		 * vdd off can generate a long/short pulse on eDP which

		 * would require vdd on to handle it, and thus we

drivers/gpu/drm/i915/display/intel_pps.c

+3 −3
Original line number Diff line number Diff line
@@ -1075,13 +1075,13 @@ static void intel_pps_vdd_sanitize(struct intel_dp *intel_dp) 
	edp_panel_vdd_schedule_off(intel_dp);

}



bool intel_pps_have_power(struct intel_dp *intel_dp)

bool intel_pps_have_panel_power_or_vdd(struct intel_dp *intel_dp)

{

	intel_wakeref_t wakeref;

	bool have_power = false;



	with_intel_pps_lock(intel_dp, wakeref) {

		have_power = edp_have_panel_power(intel_dp) &&

		have_power = edp_have_panel_power(intel_dp) ||

			     edp_have_panel_vdd(intel_dp);

	}

drivers/gpu/drm/i915/display/intel_pps.h

+1 −1
Original line number Diff line number Diff line
@@ -37,7 +37,7 @@ void intel_pps_vdd_on(struct intel_dp *intel_dp); 
void intel_pps_on(struct intel_dp *intel_dp);

void intel_pps_off(struct intel_dp *intel_dp);

void intel_pps_vdd_off_sync(struct intel_dp *intel_dp);

bool intel_pps_have_power(struct intel_dp *intel_dp);

bool intel_pps_have_panel_power_or_vdd(struct intel_dp *intel_dp);

void intel_pps_wait_power_cycle(struct intel_dp *intel_dp);



void intel_pps_init(struct intel_dp *intel_dp);

drivers/gpu/drm/i915/display/intel_psr.c

+4 −0
Original line number Diff line number Diff line
@@ -1837,6 +1837,9 @@ static void _intel_psr_post_plane_update(const struct intel_atomic_state *state, 


		mutex_lock(&psr->lock);



		if (psr->sink_not_reliable)

			goto exit;



		drm_WARN_ON(&dev_priv->drm, psr->enabled && !crtc_state->active_planes);



		/* Only enable if there is active planes */
@@ -1847,6 +1850,7 @@ static void _intel_psr_post_plane_update(const struct intel_atomic_state *state, 
		if (crtc_state->crc_enabled && psr->enabled)

			psr_force_hw_tracking_exit(intel_dp);



exit:

		mutex_unlock(&psr->lock);

	}

}

drivers/gpu/drm/i915/gem/i915_gem_mman.c

+1 −1
Original line number Diff line number Diff line
@@ -455,7 +455,7 @@ vm_access(struct vm_area_struct *area, unsigned long addr, 
		return -EACCES;



	addr -= area->vm_start;

	if (addr >= obj->base.size)

	if (range_overflows_t(u64, addr, len, obj->base.size))

		return -EINVAL;



	i915_gem_ww_ctx_init(&ww, true);