Commit f1051632 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'riscv-for-linus-5.19-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux 

Pull RISC-V fixes from Palmer Dabbelt:

 - A fix for the PolarFire SOC's device tree

 - A handful of fixes for the recently added Svpmbt support

 - An improvement to the Kconfig text for Svpbmt

* tag 'riscv-for-linus-5.19-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: Improve description for RISCV_ISA_SVPBMT Kconfig symbol
  riscv: drop cpufeature_apply_feature tracking variable
  riscv: fix dependency for t-head errata
  riscv: dts: microchip: re-add pdma to mpfs device tree
parents 2d806a68 c836d9d1

arch/riscv/Kconfig

+7 −2
Original line number Diff line number Diff line
@@ -364,8 +364,13 @@ config RISCV_ISA_SVPBMT 
	select RISCV_ALTERNATIVE

	default y

	help

	   Adds support to dynamically detect the presence of the SVPBMT extension

	   (Supervisor-mode: page-based memory types) and enable its usage.

	   Adds support to dynamically detect the presence of the SVPBMT

	   ISA-extension (Supervisor-mode: page-based memory types) and

	   enable its usage.



	   The memory type for a page contains a combination of attributes

	   that indicate the cacheability, idempotency, and ordering

	   properties for access to that page.



	   The SVPBMT extension is only available on 64Bit cpus.

arch/riscv/Kconfig.erratas

+1 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ config ERRATA_SIFIVE_CIP_1200 


config ERRATA_THEAD

	bool "T-HEAD errata"

	depends on !XIP_KERNEL

	select RISCV_ALTERNATIVE

	help

	  All T-HEAD errata Kconfig depend on this Kconfig. Disabling

arch/riscv/boot/dts/microchip/mpfs.dtsi

+9 −0
Original line number Diff line number Diff line
@@ -192,6 +192,15 @@ 
			riscv,ndev = <186>;

		};



		pdma: dma-controller@3000000 {

			compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";

			reg = <0x0 0x3000000 0x0 0x8000>;

			interrupt-parent = <&plic>;

			interrupts = <5 6>, <7 8>, <9 10>, <11 12>;

			dma-channels = <4>;

			#dma-cells = <1>;

		};



		clkcfg: clkcfg@20002000 {

			compatible = "microchip,mpfs-clkcfg";

			reg = <0x0 0x20002000 0x0 0x1000>, <0x0 0x3E001000 0x0 0x1000>;

arch/riscv/kernel/cpufeature.c

+1 −4
Original line number Diff line number Diff line
@@ -293,7 +293,6 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin, 
						  unsigned int stage)

{

	u32 cpu_req_feature = cpufeature_probe(stage);

	u32 cpu_apply_feature = 0;

	struct alt_entry *alt;

	u32 tmp;
@@ -307,10 +306,8 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin, 
		}



		tmp = (1U << alt->errata_id);

		if (cpu_req_feature & tmp) {

		if (cpu_req_feature & tmp)

			patch_text_nosync(alt->old_ptr, alt->alt_ptr, alt->alt_len);

			cpu_apply_feature |= tmp;

		}

	}

}

#endif