Commit ec0067a6 authored by Mark Brown's avatar Mark Brown Committed by Catalin Marinas
Browse files

arm64/sme: Remove _EL0 from name of SVCR - FIXME sysreg.h 



The defines for SVCR call it SVCR_EL0 however the architecture calls the
register SVCR with no _EL0 suffix. In preparation for generating the sysreg
definitions rename to match the architecture, no functional change.

Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220510161208.631259-6-broonie@kernel.org


Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent e65fc01b

arch/arm64/include/asm/fpsimd.h

+2 −2
Original line number Diff line number Diff line
@@ -67,12 +67,12 @@ extern void fpsimd_save_and_flush_cpu_state(void); 


static inline bool thread_sm_enabled(struct thread_struct *thread)

{

	return system_supports_sme() && (thread->svcr & SVCR_EL0_SM_MASK);

	return system_supports_sme() && (thread->svcr & SVCR_SM_MASK);

}



static inline bool thread_za_enabled(struct thread_struct *thread)

{

	return system_supports_sme() && (thread->svcr & SVCR_EL0_ZA_MASK);

	return system_supports_sme() && (thread->svcr & SVCR_ZA_MASK);

}



/* Maximum VL that SVE/SME VL-agnostic software can transparently support */

arch/arm64/include/asm/processor.h

+1 −1
Original line number Diff line number Diff line
@@ -192,7 +192,7 @@ static inline unsigned int thread_get_sme_vl(struct thread_struct *thread) 


static inline unsigned int thread_get_cur_vl(struct thread_struct *thread)

{

	if (system_supports_sme() && (thread->svcr & SVCR_EL0_SM_MASK))

	if (system_supports_sme() && (thread->svcr & SVCR_SM_MASK))

		return thread_get_sme_vl(thread);

	else

		return thread_get_sve_vl(thread);

arch/arm64/include/asm/sysreg.h

+3 −3
Original line number Diff line number Diff line
@@ -479,9 +479,9 @@ 
#define SYS_RNDR_EL0			sys_reg(3, 3, 2, 4, 0)

#define SYS_RNDRRS_EL0			sys_reg(3, 3, 2, 4, 1)



#define SYS_SVCR_EL0			sys_reg(3, 3, 4, 2, 2)

#define SVCR_EL0_ZA_MASK		2

#define SVCR_EL0_SM_MASK		1

#define SYS_SVCR			sys_reg(3, 3, 4, 2, 2)

#define SVCR_ZA_MASK			2

#define SVCR_SM_MASK			1



#define SYS_PMCR_EL0			sys_reg(3, 3, 9, 12, 0)

#define SYS_PMCNTENSET_EL0		sys_reg(3, 3, 9, 12, 1)

arch/arm64/kernel/fpsimd.c

+13 −13
Original line number Diff line number Diff line
@@ -410,7 +410,7 @@ static void task_fpsimd_load(void) 
		if (test_thread_flag(TIF_SME))

			sme_set_vq(sve_vq_from_vl(sme_vl) - 1);



		write_sysreg_s(current->thread.svcr, SYS_SVCR_EL0);

		write_sysreg_s(current->thread.svcr, SYS_SVCR);



		if (thread_za_enabled(&current->thread))

			za_load_state(current->thread.za_state);
@@ -462,15 +462,15 @@ static void fpsimd_save(void) 


	if (system_supports_sme()) {

		u64 *svcr = last->svcr;

		*svcr = read_sysreg_s(SYS_SVCR_EL0);

		*svcr = read_sysreg_s(SYS_SVCR);



		*svcr = read_sysreg_s(SYS_SVCR_EL0);

		*svcr = read_sysreg_s(SYS_SVCR);



		if (*svcr & SYS_SVCR_EL0_ZA_MASK)

		if (*svcr & SVCR_ZA_MASK)

			za_save_state(last->za_state);



		/* If we are in streaming mode override regular SVE. */

		if (*svcr & SYS_SVCR_EL0_SM_MASK) {

		if (*svcr & SVCR_SM_MASK) {

			save_sve_regs = true;

			save_ffr = system_supports_fa64();

			vl = last->sme_vl;
@@ -852,8 +852,8 @@ int vec_set_vector_length(struct task_struct *task, enum vec_type type, 
		sve_to_fpsimd(task);



	if (system_supports_sme() && type == ARM64_VEC_SME) {

		task->thread.svcr &= ~(SYS_SVCR_EL0_SM_MASK |

				       SYS_SVCR_EL0_ZA_MASK);

		task->thread.svcr &= ~(SVCR_SM_MASK |

				       SVCR_ZA_MASK);

		clear_thread_flag(TIF_SME);

	}
@@ -1915,10 +1915,10 @@ void __efi_fpsimd_begin(void) 
			__this_cpu_write(efi_sve_state_used, true);



			if (system_supports_sme()) {

				svcr = read_sysreg_s(SYS_SVCR_EL0);

				svcr = read_sysreg_s(SYS_SVCR);



				if (!system_supports_fa64())

					ffr = svcr & SVCR_EL0_SM_MASK;

					ffr = svcr & SVCR_SM_MASK;



				__this_cpu_write(efi_sm_state, ffr);

			}
@@ -1928,8 +1928,8 @@ void __efi_fpsimd_begin(void) 
				       ffr);



			if (system_supports_sme())

				sysreg_clear_set_s(SYS_SVCR_EL0,

						   SVCR_EL0_SM_MASK, 0);

				sysreg_clear_set_s(SYS_SVCR,

						   SVCR_SM_MASK, 0);



		} else {

			fpsimd_save_state(this_cpu_ptr(&efi_fpsimd_state));
@@ -1962,9 +1962,9 @@ void __efi_fpsimd_end(void) 
			 */

			if (system_supports_sme()) {

				if (__this_cpu_read(efi_sm_state)) {

					sysreg_clear_set_s(SYS_SVCR_EL0,

					sysreg_clear_set_s(SYS_SVCR,

							   0,

							   SVCR_EL0_SM_MASK);

							   SVCR_SM_MASK);

					if (!system_supports_fa64())

						ffr = efi_sm_state;

				}

arch/arm64/kernel/ptrace.c

+4 −4
Original line number Diff line number Diff line
@@ -867,10 +867,10 @@ static int sve_set_common(struct task_struct *target, 


		switch (type) {

		case ARM64_VEC_SVE:

			target->thread.svcr &= ~SYS_SVCR_EL0_SM_MASK;

			target->thread.svcr &= ~SVCR_SM_MASK;

			break;

		case ARM64_VEC_SME:

			target->thread.svcr |= SYS_SVCR_EL0_SM_MASK;

			target->thread.svcr |= SVCR_SM_MASK;

			break;

		default:

			WARN_ON_ONCE(1);
@@ -1100,7 +1100,7 @@ static int za_set(struct task_struct *target, 


	/* If there is no data then disable ZA */

	if (!count) {

		target->thread.svcr &= ~SYS_SVCR_EL0_ZA_MASK;

		target->thread.svcr &= ~SVCR_ZA_MASK;

		goto out;

	}
@@ -1125,7 +1125,7 @@ static int za_set(struct task_struct *target, 


	/* Mark ZA as active and let userspace use it */

	set_tsk_thread_flag(target, TIF_SME);

	target->thread.svcr |= SYS_SVCR_EL0_ZA_MASK;

	target->thread.svcr |= SVCR_ZA_MASK;



out:

	fpsimd_flush_task_state(target);