Commit e65fc01b authored by Mark Brown's avatar Mark Brown Committed by Catalin Marinas
Browse files

arm64/sme: Standardise bitfield names for SVCR 



The bitfield definitions for SVCR have a SYS_ added to the names of the
constant which will be a problem for automatic generation. Remove the
prefixes, no functional change.

Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220510161208.631259-5-broonie@kernel.org


Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent a6dab6cc

arch/arm64/include/asm/fpsimd.h

+2 −2
Original line number Diff line number Diff line
@@ -67,12 +67,12 @@ extern void fpsimd_save_and_flush_cpu_state(void); 


static inline bool thread_sm_enabled(struct thread_struct *thread)

{

	return system_supports_sme() && (thread->svcr & SYS_SVCR_EL0_SM_MASK);

	return system_supports_sme() && (thread->svcr & SVCR_EL0_SM_MASK);

}



static inline bool thread_za_enabled(struct thread_struct *thread)

{

	return system_supports_sme() && (thread->svcr & SYS_SVCR_EL0_ZA_MASK);

	return system_supports_sme() && (thread->svcr & SVCR_EL0_ZA_MASK);

}



/* Maximum VL that SVE/SME VL-agnostic software can transparently support */

arch/arm64/include/asm/processor.h

+1 −1
Original line number Diff line number Diff line
@@ -192,7 +192,7 @@ static inline unsigned int thread_get_sme_vl(struct thread_struct *thread) 


static inline unsigned int thread_get_cur_vl(struct thread_struct *thread)

{

	if (system_supports_sme() && (thread->svcr & SYS_SVCR_EL0_SM_MASK))

	if (system_supports_sme() && (thread->svcr & SVCR_EL0_SM_MASK))

		return thread_get_sme_vl(thread);

	else

		return thread_get_sve_vl(thread);

arch/arm64/include/asm/sysreg.h

+2 −2
Original line number Diff line number Diff line
@@ -480,8 +480,8 @@ 
#define SYS_RNDRRS_EL0			sys_reg(3, 3, 2, 4, 1)



#define SYS_SVCR_EL0			sys_reg(3, 3, 4, 2, 2)

#define SYS_SVCR_EL0_ZA_MASK		2

#define SYS_SVCR_EL0_SM_MASK		1

#define SVCR_EL0_ZA_MASK		2

#define SVCR_EL0_SM_MASK		1



#define SYS_PMCR_EL0			sys_reg(3, 3, 9, 12, 0)

#define SYS_PMCNTENSET_EL0		sys_reg(3, 3, 9, 12, 1)

arch/arm64/kernel/fpsimd.c

+3 −3
Original line number Diff line number Diff line
@@ -1918,7 +1918,7 @@ void __efi_fpsimd_begin(void) 
				svcr = read_sysreg_s(SYS_SVCR_EL0);



				if (!system_supports_fa64())

					ffr = svcr & SYS_SVCR_EL0_SM_MASK;

					ffr = svcr & SVCR_EL0_SM_MASK;



				__this_cpu_write(efi_sm_state, ffr);

			}
@@ -1929,7 +1929,7 @@ void __efi_fpsimd_begin(void) 


			if (system_supports_sme())

				sysreg_clear_set_s(SYS_SVCR_EL0,

						   SYS_SVCR_EL0_SM_MASK, 0);

						   SVCR_EL0_SM_MASK, 0);



		} else {

			fpsimd_save_state(this_cpu_ptr(&efi_fpsimd_state));
@@ -1964,7 +1964,7 @@ void __efi_fpsimd_end(void) 
				if (__this_cpu_read(efi_sm_state)) {

					sysreg_clear_set_s(SYS_SVCR_EL0,

							   0,

							   SYS_SVCR_EL0_SM_MASK);

							   SVCR_EL0_SM_MASK);

					if (!system_supports_fa64())

						ffr = efi_sm_state;

				}