Commit ea9f8426 authored by Tyrone Ting's avatar Tyrone Ting Committed by Wolfram Sang
Browse files

i2c: npcm: Correct register access width 



The SMBnCTL3 register is 8-bit wide and the 32-bit access was always
incorrect, but simply didn't cause a visible error on the 32-bit machine.

On the 64-bit machine, the kernel message reports that ESR value is
0x96000021. Checking Arm Architecture Reference Manual Armv8 suggests that
it's the alignment fault.

SMBnCTL3's address is 0xE.

Fixes: 56a1485b ("i2c: npcm7xx: Add Nuvoton NPCM I2C controller driver")
Signed-off-by: default avatarTyrone Ting <kfting@nuvoton.com>
Reviewed-by: default avatarJonathan Neuschäfer <j.neuschaefer@gmx.net>
Signed-off-by: default avatarWolfram Sang <wsa@kernel.org>
parent 0bf58eb1

drivers/i2c/busses/i2c-npcm7xx.c

+2 −2
Original line number Diff line number Diff line
@@ -360,14 +360,14 @@ static int npcm_i2c_get_SCL(struct i2c_adapter *_adap) 
{

	struct npcm_i2c *bus = container_of(_adap, struct npcm_i2c, adap);



	return !!(I2CCTL3_SCL_LVL & ioread32(bus->reg + NPCM_I2CCTL3));

	return !!(I2CCTL3_SCL_LVL & ioread8(bus->reg + NPCM_I2CCTL3));

}



static int npcm_i2c_get_SDA(struct i2c_adapter *_adap)

{

	struct npcm_i2c *bus = container_of(_adap, struct npcm_i2c, adap);



	return !!(I2CCTL3_SDA_LVL & ioread32(bus->reg + NPCM_I2CCTL3));

	return !!(I2CCTL3_SDA_LVL & ioread8(bus->reg + NPCM_I2CCTL3));

}



static inline u16 npcm_i2c_get_index(struct npcm_i2c *bus)