Unverified Commit e87ec244 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
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!3834 Add support for Hygon model 4h IOAPIC 

Merge Pull Request from: @hygoner 
 
Add southbridge IOAPIC support for Hygon family 18h model 4h+ processors.

Reference:
https://gitee.com/openeuler/kernel/pulls/1638
https://gitee.com/openeuler/kernel/pulls/1531
https://gitee.com/openeuler/kernel/pulls/1565 
 
Link:https://gitee.com/openeuler/kernel/pulls/3834

 

Reviewed-by: default avatarJason Zeng <jason.zeng@intel.com>
Reviewed-by: default avatarAichun Shi <aichun.shi@intel.com>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parents 721d137e 57678cdd

drivers/iommu/amd/init.c

+9 −1
Original line number Diff line number Diff line
@@ -3001,6 +3001,9 @@ static void __init free_iommu_resources(void) 
/* SB IOAPIC is always on this device in AMD systems */

#define IOAPIC_SB_DEVID		((0x00 << 8) | PCI_DEVFN(0x14, 0))



/* SB IOAPIC for Hygon family 18h model 4h is on the device 0xb */

#define IOAPIC_SB_DEVID_FAM18H_M4H	((0x00 << 8) | PCI_DEVFN(0xb, 0))



static bool __init check_ioapic_information(void)

{

	const char *fw_bug = FW_BUG;
@@ -3026,7 +3029,12 @@ static bool __init check_ioapic_information(void) 
			pr_err("%s: IOAPIC[%d] not in IVRS table\n",

				fw_bug, id);

			ret = false;

		} else if (devid == IOAPIC_SB_DEVID) {

		} else if (devid == IOAPIC_SB_DEVID ||

			   (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON &&

			    boot_cpu_data.x86 == 0x18 &&

			    boot_cpu_data.x86_model >= 0x4 &&

			    boot_cpu_data.x86_model <= 0xf &&

			    devid == IOAPIC_SB_DEVID_FAM18H_M4H)) {

			has_sb_ioapic = true;

			ret           = true;

		}