Unverified Commit 721d137e authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
Browse files

!3830 Add support for Hygon model 5h CPU cache 

Merge Pull Request from: @hygoner 
 
Get the LLC ID for Hygon family 18h model 5h+ processors.

Reference:
https://gitee.com/openeuler/kernel/pulls/1638
https://gitee.com/openeuler/kernel/pulls/1531
https://gitee.com/openeuler/kernel/pulls/1565 
 
Link:https://gitee.com/openeuler/kernel/pulls/3830

 

Reviewed-by: default avatarJason Zeng <jason.zeng@intel.com>
Reviewed-by: default avatarAichun Shi <aichun.shi@intel.com>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parents f3d2858e 5cdbea24

arch/x86/kernel/cpu/cacheinfo.c

+24 −5
Original line number Diff line number Diff line
@@ -708,11 +708,30 @@ void cacheinfo_hygon_init_llc_id(struct cpuinfo_x86 *c, int cpu) 
	if (!cpuid_edx(0x80000006))

		return;



	if (c->x86_model < 0x5) {

		/*

		 * LLC is at the core complex level.

		 * Core complex ID is ApicId[3] for these processors.

		 */

		per_cpu(cpu_llc_id, cpu) = c->apicid >> 3;

	} else {

		/*

		 * LLC ID is calculated from the number of threads

		 * sharing the cache.

		 */

		u32 eax, ebx, ecx, edx, num_sharing_cache = 0;

		u32 llc_index = find_num_cache_leaves(c) - 1;



		cpuid_count(0x8000001d, llc_index, &eax, &ebx, &ecx, &edx);

		if (eax)

			num_sharing_cache = ((eax >> 14) & 0xfff) + 1;



		if (num_sharing_cache) {

			int bits = get_count_order(num_sharing_cache);



			per_cpu(cpu_llc_id, cpu) = c->apicid >> bits;

		}

	}

}



void init_amd_cacheinfo(struct cpuinfo_x86 *c)