Commit e7400038 authored by Hariprasad Kelam's avatar Hariprasad Kelam Committed by David S. Miller
Browse files

octeontx2-af: Flow control resource management 



CN10K MAC block (RPM) and Octeontx2 MAC block (CGX) both supports
PFC flow control and 802.3X flow control pause frames.

Each MAC block supports max 4 LMACS and AF driver assigns same
(MAC,LMAC) to PF and its VFs. As PF and its share same (MAC,LMAC)
pair we need resource management to address below scenarios

1. Maintain PFC and 8023X pause frames mutually exclusive.
2. Reject disable flow control request if other PF or Vfs
   enabled it.

Signed-off-by: default avatarHariprasad Kelam <hkelam@marvell.com>
Signed-off-by: default avatarSunil Kovvuri Goutham <sgoutham@marvell.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 1121f6b0

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

+133 −33
Original line number Diff line number Diff line
@@ -578,16 +578,51 @@ void cgx_lmac_promisc_config(int cgx_id, int lmac_id, bool enable) 
	}

}



static int cgx_lmac_get_pause_frm_status(void *cgxd, int lmac_id,

					 u8 *tx_pause, u8 *rx_pause)

{

	struct cgx *cgx = cgxd;

	u64 cfg;



	if (is_dev_rpm(cgx))

		return 0;



	if (!is_lmac_valid(cgx, lmac_id))

		return -ENODEV;



	cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL);

	*rx_pause = !!(cfg & CGX_SMUX_RX_FRM_CTL_CTL_BCK);



	cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_TX_CTL);

	*tx_pause = !!(cfg & CGX_SMUX_TX_CTL_L2P_BP_CONV);

	return 0;

}



/* Enable or disable forwarding received pause frames to Tx block */

void cgx_lmac_enadis_rx_pause_fwding(void *cgxd, int lmac_id, bool enable)

{

	struct cgx *cgx = cgxd;

	u8 rx_pause, tx_pause;

	bool is_pfc_enabled;

	struct lmac *lmac;

	u64 cfg;



	if (!cgx)

		return;



	lmac = lmac_pdata(lmac_id, cgx);

	if (!lmac)

		return;



	/* Pause frames are not enabled just return */

	if (!bitmap_weight(lmac->rx_fc_pfvf_bmap.bmap, lmac->rx_fc_pfvf_bmap.max))

		return;



	cgx_lmac_get_pause_frm_status(cgx, lmac_id, &rx_pause, &tx_pause);

	is_pfc_enabled = rx_pause ? false : true;



	if (enable) {

		if (!is_pfc_enabled) {

			cfg = cgx_read(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL);

			cfg |= CGX_GMP_GMI_RXX_FRM_CTL_CTL_BCK;

			cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg);
@@ -596,6 +631,13 @@ void cgx_lmac_enadis_rx_pause_fwding(void *cgxd, int lmac_id, bool enable) 
			cfg |= CGX_SMUX_RX_FRM_CTL_CTL_BCK;

			cgx_write(cgx, lmac_id,	CGXX_SMUX_RX_FRM_CTL, cfg);

		} else {

			cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_CBFC_CTL);

			cfg |= CGXX_SMUX_CBFC_CTL_BCK_EN;

			cgx_write(cgx, lmac_id, CGXX_SMUX_CBFC_CTL, cfg);

		}

	} else {



		if (!is_pfc_enabled) {

			cfg = cgx_read(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL);

			cfg &= ~CGX_GMP_GMI_RXX_FRM_CTL_CTL_BCK;

			cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg);
@@ -603,6 +645,11 @@ void cgx_lmac_enadis_rx_pause_fwding(void *cgxd, int lmac_id, bool enable) 
			cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL);

			cfg &= ~CGX_SMUX_RX_FRM_CTL_CTL_BCK;

			cgx_write(cgx, lmac_id,	CGXX_SMUX_RX_FRM_CTL, cfg);

		} else {

			cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_CBFC_CTL);

			cfg &= ~CGXX_SMUX_CBFC_CTL_BCK_EN;

			cgx_write(cgx, lmac_id, CGXX_SMUX_CBFC_CTL, cfg);

		}

	}

}
@@ -722,26 +769,6 @@ int cgx_lmac_tx_enable(void *cgxd, int lmac_id, bool enable) 
	return !!(last & DATA_PKT_TX_EN);

}



static int cgx_lmac_get_pause_frm_status(void *cgxd, int lmac_id,

					 u8 *tx_pause, u8 *rx_pause)

{

	struct cgx *cgx = cgxd;

	u64 cfg;



	if (is_dev_rpm(cgx))

		return 0;



	if (!is_lmac_valid(cgx, lmac_id))

		return -ENODEV;



	cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL);

	*rx_pause = !!(cfg & CGX_SMUX_RX_FRM_CTL_CTL_BCK);



	cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_TX_CTL);

	*tx_pause = !!(cfg & CGX_SMUX_TX_CTL_L2P_BP_CONV);

	return 0;

}



static int cgx_lmac_enadis_pause_frm(void *cgxd, int lmac_id,

				     u8 tx_pause, u8 rx_pause)

{
@@ -815,6 +842,47 @@ static void cgx_lmac_pause_frm_config(void *cgxd, int lmac_id, bool enable) 
	cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_TX_CTL);

	cfg &= ~CGX_SMUX_TX_CTL_L2P_BP_CONV;

	cgx_write(cgx, lmac_id, CGXX_SMUX_TX_CTL, cfg);



	cfg = cgx_read(cgx, 0, CGXX_CMR_RX_OVR_BP);

	cfg |= CGX_CMR_RX_OVR_BP_EN(lmac_id);

	cfg &= ~CGX_CMR_RX_OVR_BP_BP(lmac_id);

	cgx_write(cgx, 0, CGXX_CMR_RX_OVR_BP, cfg);

}



int verify_lmac_fc_cfg(void *cgxd, int lmac_id, u8 tx_pause, u8 rx_pause,

		       int pfvf_idx)

{

	struct cgx *cgx = cgxd;

	struct lmac *lmac;



	lmac = lmac_pdata(lmac_id, cgx);

	if (!lmac)

		return -ENODEV;



	if (!rx_pause)

		clear_bit(pfvf_idx, lmac->rx_fc_pfvf_bmap.bmap);

	else

		set_bit(pfvf_idx, lmac->rx_fc_pfvf_bmap.bmap);



	if (!tx_pause)

		clear_bit(pfvf_idx, lmac->tx_fc_pfvf_bmap.bmap);

	else

		set_bit(pfvf_idx, lmac->tx_fc_pfvf_bmap.bmap);



	/* check if other pfvfs are using flow control */

	if (!rx_pause && bitmap_weight(lmac->rx_fc_pfvf_bmap.bmap, lmac->rx_fc_pfvf_bmap.max)) {

		dev_warn(&cgx->pdev->dev,

			 "Receive Flow control disable not permitted as its used by other PFVFs\n");

		return -EPERM;

	}



	if (!tx_pause && bitmap_weight(lmac->tx_fc_pfvf_bmap.bmap, lmac->tx_fc_pfvf_bmap.max)) {

		dev_warn(&cgx->pdev->dev,

			 "Transmit Flow control disable not permitted as its used by other PFVFs\n");

		return -EPERM;

	}



	return 0;

}



int cgx_lmac_pfc_config(void *cgxd, int lmac_id, u8 tx_pause,
@@ -858,6 +926,23 @@ int cgx_lmac_pfc_config(void *cgxd, int lmac_id, u8 tx_pause, 
	return 0;

}



int cgx_lmac_get_pfc_frm_cfg(void *cgxd, int lmac_id, u8 *tx_pause,

			     u8 *rx_pause)

{

	struct cgx *cgx = cgxd;

	u64 cfg;



	if (!is_lmac_valid(cgx, lmac_id))

		return -ENODEV;



	cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_CBFC_CTL);



	*rx_pause = !!(cfg & CGXX_SMUX_CBFC_CTL_RX_EN);

	*tx_pause = !!(cfg & CGXX_SMUX_CBFC_CTL_TX_EN);



	return 0;

}



void cgx_lmac_ptp_config(void *cgxd, int lmac_id, bool enable)

{

	struct cgx *cgx = cgxd;
@@ -1517,6 +1602,16 @@ static int cgx_lmac_init(struct cgx *cgx) 
		/* Reserve first entry for default MAC address */

		set_bit(0, lmac->mac_to_index_bmap.bmap);



		lmac->rx_fc_pfvf_bmap.max = 128;

		err = rvu_alloc_bitmap(&lmac->rx_fc_pfvf_bmap);

		if (err)

			goto err_dmac_bmap_free;



		lmac->tx_fc_pfvf_bmap.max = 128;

		err = rvu_alloc_bitmap(&lmac->tx_fc_pfvf_bmap);

		if (err)

			goto err_rx_fc_bmap_free;



		init_waitqueue_head(&lmac->wq_cmd_cmplt);

		mutex_init(&lmac->cmd_lock);

		spin_lock_init(&lmac->event_cb_lock);
@@ -1533,6 +1628,10 @@ static int cgx_lmac_init(struct cgx *cgx) 
	return cgx_lmac_verify_fwi_version(cgx);



err_bitmap_free:

	rvu_free_bitmap(&lmac->tx_fc_pfvf_bmap);

err_rx_fc_bmap_free:

	rvu_free_bitmap(&lmac->rx_fc_pfvf_bmap);

err_dmac_bmap_free:

	rvu_free_bitmap(&lmac->mac_to_index_bmap);

err_name_free:

	kfree(lmac->name);
@@ -1601,6 +1700,7 @@ static struct mac_ops cgx_mac_ops = { 
	.mac_rx_tx_enable =		cgx_lmac_rx_tx_enable,

	.mac_tx_enable =		cgx_lmac_tx_enable,

	.pfc_config =                   cgx_lmac_pfc_config,

	.mac_get_pfc_frm_cfg   =        cgx_lmac_get_pfc_frm_cfg,

};



static int cgx_probe(struct pci_dev *pdev, const struct pci_device_id *id)

drivers/net/ethernet/marvell/octeontx2/af/cgx.h

+4 −0
Original line number Diff line number Diff line
@@ -181,4 +181,8 @@ u64 cgx_read_dmac_ctrl(void *cgxd, int lmac_id); 
u64 cgx_read_dmac_entry(void *cgxd, int index);

int cgx_lmac_pfc_config(void *cgxd, int lmac_id, u8 tx_pause, u8 rx_pause,

			u16 pfc_en);

int cgx_lmac_get_pfc_frm_cfg(void *cgxd, int lmac_id, u8 *tx_pause,

			     u8 *rx_pause);

int verify_lmac_fc_cfg(void *cgxd, int lmac_id, u8 tx_pause, u8 rx_pause,

		       int pfvf_idx);

#endif /* CGX_H */

drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h

+7 −0
Original line number Diff line number Diff line
@@ -17,6 +17,8 @@ 
 * @resp:		command response

 * @link_info:		link related information

 * @mac_to_index_bmap:	Mac address to CGX table index mapping

 * @rx_fc_pfvf_bmap:    Receive flow control enabled netdev mapping

 * @tx_fc_pfvf_bmap:    Transmit flow control enabled netdev mapping

 * @event_cb:		callback for linkchange events

 * @event_cb_lock:	lock for serializing callback with unregister

 * @cgx:		parent cgx port
@@ -33,6 +35,8 @@ struct lmac { 
	u64 resp;

	struct cgx_link_user_info link_info;

	struct rsrc_bmap mac_to_index_bmap;

	struct rsrc_bmap rx_fc_pfvf_bmap;

	struct rsrc_bmap tx_fc_pfvf_bmap;

	struct cgx_event_cb event_cb;

	/* lock for serializing callback with unregister */

	spinlock_t event_cb_lock;
@@ -113,6 +117,9 @@ struct mac_ops { 
	int                     (*pfc_config)(void *cgxd, int lmac_id,

					      u8 tx_pause, u8 rx_pause, u16 pfc_en);



	int                     (*mac_get_pfc_frm_cfg)(void *cgxd, int lmac_id,

						       u8 *tx_pause, u8 *rx_pause);



};



struct cgx {

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

+2 −0
Original line number Diff line number Diff line
@@ -1620,6 +1620,8 @@ enum cgx_af_status { 
	LMAC_AF_ERR_INVALID_PARAM	= -1101,

	LMAC_AF_ERR_PF_NOT_MAPPED	= -1102,

	LMAC_AF_ERR_PERM_DENIED		= -1103,

	LMAC_AF_ERR_PFC_ENADIS_PERM_DENIED       = -1104,

	LMAC_AF_ERR_8023PAUSE_ENADIS_PERM_DENIED = -1105,

};



#endif /* MBOX_H */

drivers/net/ethernet/marvell/octeontx2/af/rpm.c

+31 −3
Original line number Diff line number Diff line
@@ -33,6 +33,7 @@ static struct mac_ops rpm_mac_ops = { 
	.mac_rx_tx_enable =		rpm_lmac_rx_tx_enable,

	.mac_tx_enable =		rpm_lmac_tx_enable,

	.pfc_config =                   rpm_lmac_pfc_config,

	.mac_get_pfc_frm_cfg   =        rpm_lmac_get_pfc_frm_cfg,

};



struct mac_ops *rpm_get_mac_ops(void)
@@ -97,11 +98,20 @@ int rpm_lmac_rx_tx_enable(void *rpmd, int lmac_id, bool enable) 
void rpm_lmac_enadis_rx_pause_fwding(void *rpmd, int lmac_id, bool enable)

{

	rpm_t *rpm = rpmd;

	struct lmac *lmac;

	u64 cfg;



	if (!rpm)

		return;



	lmac = lmac_pdata(lmac_id, rpm);

	if (!lmac)

		return;



	/* Pause frames are not enabled just return */

	if (!bitmap_weight(lmac->rx_fc_pfvf_bmap.bmap, lmac->rx_fc_pfvf_bmap.max))

		return;



	if (enable) {

		cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);

		cfg &= ~RPMX_MTI_MAC100X_COMMAND_CONFIG_PAUSE_IGNORE;
@@ -123,10 +133,11 @@ int rpm_lmac_get_pause_frm_status(void *rpmd, int lmac_id, 
		return -ENODEV;



	cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);

	if (!(cfg & RPMX_MTI_MAC100X_COMMAND_CONFIG_PFC_MODE)) {

		*rx_pause = !(cfg & RPMX_MTI_MAC100X_COMMAND_CONFIG_RX_P_DISABLE);



	cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);

		*tx_pause = !(cfg & RPMX_MTI_MAC100X_COMMAND_CONFIG_TX_P_DISABLE);

	}



	return 0;

}
@@ -416,3 +427,20 @@ int rpm_lmac_pfc_config(void *rpmd, int lmac_id, u8 tx_pause, u8 rx_pause, u16 p 


	return 0;

}



int  rpm_lmac_get_pfc_frm_cfg(void *rpmd, int lmac_id, u8 *tx_pause, u8 *rx_pause)

{

	rpm_t *rpm = rpmd;

	u64 cfg;



	if (!is_lmac_valid(rpm, lmac_id))

		return -ENODEV;



	cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);

	if (cfg & RPMX_MTI_MAC100X_COMMAND_CONFIG_PFC_MODE) {

		*rx_pause = !(cfg & RPMX_MTI_MAC100X_COMMAND_CONFIG_RX_P_DISABLE);

		*tx_pause = !(cfg & RPMX_MTI_MAC100X_COMMAND_CONFIG_TX_P_DISABLE);

	}



	return 0;

}