Unverified Commit e4d63473 authored by Patrice Chotard's avatar Patrice Chotard Committed by Mark Brown
Browse files

spi: stm32-qspi: Update spi registering 



Some device driver need to communicate to qspi device during the remove
process, qspi controller must be functional when spi_unregister_master()
is called.

To ensure this, replace devm_spi_register_master() by spi_register_master()
and spi_unregister_master() is called directly in .remove callback before
stopping the qspi controller.

This issue was put in evidence using kernel v5.11 and later
with a spi-nor which supports the software reset feature introduced
by commit d73ee753 ("mtd: spi-nor: core: perform a Soft Reset on
shutdown")

Fixes: c530cd1d ("spi: spi-mem: add stm32 qspi controller")

Signed-off-by: default avatarPatrice Chotard <patrice.chotard@foss.st.com>
Cc: <stable@vger.kernel.org> # 5.8.x
Reviewed-by: default avatarLukas Wunner <lukas@wunner.de>
Link: https://lore.kernel.org/r/20220117121744.29729-1-patrice.chotard@foss.st.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 44ea6281

drivers/spi/spi-stm32-qspi.c

+17 −30
Original line number Diff line number Diff line
@@ -688,7 +688,7 @@ static int stm32_qspi_probe(struct platform_device *pdev) 
	struct resource *res;

	int ret, irq;



	ctrl = spi_alloc_master(dev, sizeof(*qspi));

	ctrl = devm_spi_alloc_master(dev, sizeof(*qspi));

	if (!ctrl)

		return -ENOMEM;
@@ -697,58 +697,46 @@ static int stm32_qspi_probe(struct platform_device *pdev) 


	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "qspi");

	qspi->io_base = devm_ioremap_resource(dev, res);

	if (IS_ERR(qspi->io_base)) {

		ret = PTR_ERR(qspi->io_base);

		goto err_master_put;

	}

	if (IS_ERR(qspi->io_base))

		return PTR_ERR(qspi->io_base);



	qspi->phys_base = res->start;



	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "qspi_mm");

	qspi->mm_base = devm_ioremap_resource(dev, res);

	if (IS_ERR(qspi->mm_base)) {

		ret = PTR_ERR(qspi->mm_base);

		goto err_master_put;

	}

	if (IS_ERR(qspi->mm_base))

		return PTR_ERR(qspi->mm_base);



	qspi->mm_size = resource_size(res);

	if (qspi->mm_size > STM32_QSPI_MAX_MMAP_SZ) {

		ret = -EINVAL;

		goto err_master_put;

	}

	if (qspi->mm_size > STM32_QSPI_MAX_MMAP_SZ)

		return -EINVAL;



	irq = platform_get_irq(pdev, 0);

	if (irq < 0) {

		ret = irq;

		goto err_master_put;

	}

	if (irq < 0)

		return irq;



	ret = devm_request_irq(dev, irq, stm32_qspi_irq, 0,

			       dev_name(dev), qspi);

	if (ret) {

		dev_err(dev, "failed to request irq\n");

		goto err_master_put;

		return ret;

	}



	init_completion(&qspi->data_completion);

	init_completion(&qspi->match_completion);



	qspi->clk = devm_clk_get(dev, NULL);

	if (IS_ERR(qspi->clk)) {

		ret = PTR_ERR(qspi->clk);

		goto err_master_put;

	}

	if (IS_ERR(qspi->clk))

		return PTR_ERR(qspi->clk);



	qspi->clk_rate = clk_get_rate(qspi->clk);

	if (!qspi->clk_rate) {

		ret = -EINVAL;

		goto err_master_put;

	}

	if (!qspi->clk_rate)

		return -EINVAL;



	ret = clk_prepare_enable(qspi->clk);

	if (ret) {

		dev_err(dev, "can not enable the clock\n");

		goto err_master_put;

		return ret;

	}



	rstc = devm_reset_control_get_exclusive(dev, NULL);
@@ -784,7 +772,7 @@ static int stm32_qspi_probe(struct platform_device *pdev) 
	pm_runtime_enable(dev);

	pm_runtime_get_noresume(dev);



	ret = devm_spi_register_master(dev, ctrl);

	ret = spi_register_master(ctrl);

	if (ret)

		goto err_pm_runtime_free;
@@ -806,8 +794,6 @@ static int stm32_qspi_probe(struct platform_device *pdev) 
	stm32_qspi_dma_free(qspi);

err_clk_disable:

	clk_disable_unprepare(qspi->clk);

err_master_put:

	spi_master_put(qspi->ctrl);



	return ret;

}
@@ -817,6 +803,7 @@ static int stm32_qspi_remove(struct platform_device *pdev) 
	struct stm32_qspi *qspi = platform_get_drvdata(pdev);



	pm_runtime_get_sync(qspi->dev);

	spi_unregister_master(qspi->ctrl);

	/* disable qspi */

	writel_relaxed(0, qspi->io_base + QSPI_CR);

	stm32_qspi_dma_free(qspi);