Unverified Commit e4078ebb authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'riscv-dt-for-v6.6-final' of...

Merge tag 'riscv-dt-for-v6.6-final' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux

 into arm/fixes

RISC-V Devicetrees for v6.6-final

A single fix for the Starfive VisionFive 2 platform so that chip select
for SPI matches the vendor documentation.

Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>

* tag 'riscv-dt-for-v6.6-final' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  riscv: dts: starfive: visionfive 2: correct spi's ss pin

Link: https://lore.kernel.org/r/20231015-outmatch-tragedy-228f91d396b5@spud


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 5e24617f cf98fe6b
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment