Commit e0bb3312 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'clk-microchip-fixes-6.1-2' of... 

Merge tag 'clk-microchip-fixes-6.1-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into clk-microchip

Pull Microchip clk driver updates from Claudiu Beznea:

It contains a fix for Microchip Polarfire clocks; the fix consist in checking
the return value of devm_kzalloc() in mpfs_ccc_register_outputs() to
avoid possible null pointer dereference.

* tag 'clk-microchip-fixes-6.1-2' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  clk: microchip: check for null return of devm_kzalloc()
  ARM: at91: rm9200: fix usb device clock id
parents 9abf2313 e2e6a217

arch/arm/boot/dts/at91rm9200.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -666,7 +666,7 @@ 
				compatible = "atmel,at91rm9200-udc";

				reg = <0xfffb0000 0x4000>;

				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>;

				clocks = <&pmc PMC_TYPE_PERIPHERAL 11>, <&pmc PMC_TYPE_SYSTEM 2>;

				clocks = <&pmc PMC_TYPE_PERIPHERAL 11>, <&pmc PMC_TYPE_SYSTEM 1>;

				clock-names = "pclk", "hclk";

				status = "disabled";

			};

drivers/clk/at91/at91rm9200.c

+1 −1
Original line number Diff line number Diff line
@@ -40,7 +40,7 @@ static const struct clk_pll_characteristics rm9200_pll_characteristics = { 
};



static const struct sck at91rm9200_systemck[] = {

	{ .n = "udpck", .p = "usbck",    .id = 2 },

	{ .n = "udpck", .p = "usbck",    .id = 1 },

	{ .n = "uhpck", .p = "usbck",    .id = 4 },

	{ .n = "pck0",  .p = "prog0",    .id = 8 },

	{ .n = "pck1",  .p = "prog1",    .id = 9 },

drivers/clk/microchip/clk-mpfs-ccc.c

+6 −0
Original line number Diff line number Diff line
@@ -166,6 +166,9 @@ static int mpfs_ccc_register_outputs(struct device *dev, struct mpfs_ccc_out_hw_ 
		struct mpfs_ccc_out_hw_clock *out_hw = &out_hws[i];

		char *name = devm_kzalloc(dev, 23, GFP_KERNEL);



		if (!name)

			return -ENOMEM;



		snprintf(name, 23, "%s_out%u", parent->name, i);

		out_hw->divider.hw.init = CLK_HW_INIT_HW(name, &parent->hw, &clk_divider_ops, 0);

		out_hw->divider.reg = data->pll_base[i / MPFS_CCC_OUTPUTS_PER_PLL] +
@@ -200,6 +203,9 @@ static int mpfs_ccc_register_plls(struct device *dev, struct mpfs_ccc_pll_hw_clo 
		struct mpfs_ccc_pll_hw_clock *pll_hw = &pll_hws[i];

		char *name = devm_kzalloc(dev, 18, GFP_KERNEL);



		if (!name)

			return -ENOMEM;



		pll_hw->base = data->pll_base[i];

		snprintf(name, 18, "ccc%s_pll%u", strchrnul(dev->of_node->full_name, '@'), i);

		pll_hw->name = (const char *)name;