Commit dfea6ae3 authored by Moudy Ho's avatar Moudy Ho Committed by Stephen Boyd
Browse files

dt-bindings: arm: mediatek: migrate MT8195 vppsys0/1 to mtk-mmsys driver 



MT8195 VPPSYS 0/1 should be probed from mtk-mmsys driver to
populate device by platform_device_register_data then start
its own clock driver.

Signed-off-by: default avatarMoudy Ho <moudy.ho@mediatek.com>
Link: https://lore.kernel.org/r/20230118031509.29834-2-moudy.ho@mediatek.com


Acked-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 813c3b53

Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml

+0 −16
Original line number Diff line number Diff line
@@ -28,11 +28,9 @@ properties: 
          - mediatek,mt8195-imp_iic_wrap_s

          - mediatek,mt8195-imp_iic_wrap_w

          - mediatek,mt8195-mfgcfg

          - mediatek,mt8195-vppsys0

          - mediatek,mt8195-wpesys

          - mediatek,mt8195-wpesys_vpp0

          - mediatek,mt8195-wpesys_vpp1

          - mediatek,mt8195-vppsys1

          - mediatek,mt8195-imgsys

          - mediatek,mt8195-imgsys1_dip_top

          - mediatek,mt8195-imgsys1_dip_nr
@@ -92,13 +90,6 @@ examples: 
        #clock-cells = <1>;

    };



  - |

    vppsys0: clock-controller@14000000 {

        compatible = "mediatek,mt8195-vppsys0";

        reg = <0x14000000 0x1000>;

        #clock-cells = <1>;

    };



  - |

    wpesys: clock-controller@14e00000 {

        compatible = "mediatek,mt8195-wpesys";
@@ -120,13 +111,6 @@ examples: 
        #clock-cells = <1>;

    };



  - |

    vppsys1: clock-controller@14f00000 {

        compatible = "mediatek,mt8195-vppsys1";

        reg = <0x14f00000 0x1000>;

        #clock-cells = <1>;

    };



  - |

    imgsys: clock-controller@15000000 {

        compatible = "mediatek,mt8195-imgsys";