Commit d98e72b6 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski
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dt-bindings: memory: lpddr3: adjust IO width to spec 



According to JEDEC Standard No. 209-3 (table 3.4.1 "Mode Register
Assignment and Definition in LPDDR3 SDRAM"), the LPDDR3 supports only
16- and 32-bit IO width.  Drop the unsupported others.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220206135807.211767-5-krzysztof.kozlowski@canonical.com
parent 28f81858

Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml

+0 −2
Original line number Diff line number Diff line
@@ -34,10 +34,8 @@ properties: 
    description: |

      IO bus width in bits of SDRAM chip.

    enum:

      - 64

      - 32

      - 16

      - 8



  manufacturer-id:

    $ref: /schemas/types.yaml#/definitions/uint32