Unverified Commit d8ece8b8 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'riscv-dt-for-v6.5-pt2' of... 

Merge tag 'riscv-dt-for-v6.5-pt2' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux

 into soc/dt

RISC-V Devicetrees for v6.5 Part 2

T-Head:
Add a basic dtsi, Kconfig bits & trivial binding additions for the T-Head
1520 SoC (codename "light"). This SoC can be found on the Lichee Pi 4a,
for which a minimal dts is added.

Misc:
Re-sort the dts Makefile to be in alphanumerical order by directory.

Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>

* tag 'riscv-dt-for-v6.5-pt2' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  riscv: dts: sort makefile entries by directory
  riscv: defconfig: enable T-HEAD SoC
  MAINTAINERS: add entry for T-HEAD RISC-V SoC
  riscv: dts: thead: add sipeed Lichee Pi 4A board device tree
  riscv: dts: add initial T-HEAD TH1520 SoC device tree
  riscv: Add the T-HEAD SoC family Kconfig option
  dt-bindings: riscv: Add T-HEAD TH1520 board compatibles
  dt-bindings: timer: Add T-HEAD TH1520 clint
  dt-bindings: interrupt-controller: Add T-HEAD's TH1520 PLIC

Link: https://lore.kernel.org/r/20230620-fidelity-variety-60b47c889e31@spud


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents d704f1fe 2bd9e071

Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml

+1 −0
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@@ -65,6 +65,7 @@ properties: 
      - items:

          - enum:

              - allwinner,sun20i-d1-plic

              - thead,th1520-plic

          - const: thead,c900-plic

      - items:

          - const: sifive,plic-1.0.0

Documentation/devicetree/bindings/riscv/thead.yaml

0 → 100644
+29 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/riscv/thead.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: T-HEAD SoC-based boards



maintainers:

  - Jisheng Zhang <jszhang@kernel.org>



description:

  T-HEAD SoC-based boards



properties:

  $nodename:

    const: '/'

  compatible:

    oneOf:

      - description: Sipeed Lichee Pi 4A board for the Sipeed Lichee Module 4A

        items:

          - enum:

              - sipeed,lichee-pi-4a

          - const: sipeed,lichee-module-4a

          - const: thead,th1520



additionalProperties: true



...

Documentation/devicetree/bindings/timer/sifive,clint.yaml

+1 −0
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ properties: 
      - items:

          - enum:

              - allwinner,sun20i-d1-clint

              - thead,th1520-clint

          - const: thead,c900-clint

      - items:

          - const: sifive,clint0

MAINTAINERS

+8 −0
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@@ -18163,6 +18163,14 @@ F: drivers/perf/riscv_pmu.c 
F:	drivers/perf/riscv_pmu_legacy.c

F:	drivers/perf/riscv_pmu_sbi.c









RISC-V THEAD SoC SUPPORT









M:	Jisheng Zhang <jszhang@kernel.org>









M:	Guo Ren <guoren@kernel.org>









M:	Fu Wei <wefu@redhat.com>









L:	linux-riscv@lists.infradead.org









S:	Maintained









F:	arch/riscv/boot/dts/thead/

















RNBD BLOCK DRIVERS









M:	Md. Haris Iqbal <haris.iqbal@ionos.com>









M:	Jack Wang <jinpu.wang@ionos.com>

























arch/riscv/Kconfig.socs



+6
−0






























Original line number
Diff line number
Diff line







@@ -41,6 +41,12 @@ config ARCH_SUNXI







	  This enables support for Allwinner sun20i platform hardware,









	  including boards based on the D1 and D1s SoCs.



















config ARCH_THEAD









	bool "T-HEAD RISC-V SoCs"









	select ERRATA_THEAD









	help









	  This enables support for the RISC-V based T-HEAD SoCs.



















config ARCH_VIRT









	def_bool SOC_VIRT