Commit d73c162e authored by Vincenzo Frascino's avatar Vincenzo Frascino Committed by Will Deacon
Browse files

arm64: mte: CPU feature detection for Asymm MTE 



Add the cpufeature entries to detect the presence of Asymmetric MTE.

Note: The tag checking mode is initialized via cpu_enable_mte() ->
kasan_init_hw_tags() hence to enable it we require asymmetric mode
to be at least on the boot CPU. If the boot CPU does not have it, it is
fine for late CPUs to have it as long as the feature is not enabled
(ARM64_CPUCAP_BOOT_CPU_FEATURE).

Cc: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Suzuki K Poulose <Suzuki.Poulose@arm.com>
Signed-off-by: default avatarVincenzo Frascino <vincenzo.frascino@arm.com>
Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Reviewed-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20211006154751.4463-4-vincenzo.frascino@arm.com


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent ba1a98e8

arch/arm64/kernel/cpufeature.c

+10 −0
Original line number Diff line number Diff line
@@ -2321,6 +2321,16 @@ static const struct arm64_cpu_capabilities arm64_features[] = { 
		.sign = FTR_UNSIGNED,

		.cpu_enable = cpu_enable_mte,

	},

	{

		.desc = "Asymmetric MTE Tag Check Fault",

		.capability = ARM64_MTE_ASYMM,

		.type = ARM64_CPUCAP_BOOT_CPU_FEATURE,

		.matches = has_cpuid_feature,

		.sys_reg = SYS_ID_AA64PFR1_EL1,

		.field_pos = ID_AA64PFR1_MTE_SHIFT,

		.min_field_value = ID_AA64PFR1_MTE_ASYMM,

		.sign = FTR_UNSIGNED,

	},

#endif /* CONFIG_ARM64_MTE */

	{

		.desc = "RCpc load-acquire (LDAPR)",

arch/arm64/tools/cpucaps

+1 −0
Original line number Diff line number Diff line
@@ -39,6 +39,7 @@ HW_DBM 
KVM_PROTECTED_MODE

MISMATCHED_CACHE_TYPE

MTE

MTE_ASYMM

SPECTRE_V2

SPECTRE_V3A

SPECTRE_V4