Commit d6d4f0a1 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2023-06-08' of...

Merge tag 'drm-intel-fixes-2023-06-08' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-fixes

CDCLK voltage fix for ADL-P and eDP wake sync pulse fix.
Two error handling fixes to selftests (to appease static checkers)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ZIGUHBz7+LsqN2nm@jlahtine-mobl.ger.corp.intel.com
parents b1913ff4 79d0150d
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+26 −4
Original line number Diff line number Diff line
@@ -1453,6 +1453,18 @@ static u8 tgl_calc_voltage_level(int cdclk)
		return 0;
}

static u8 rplu_calc_voltage_level(int cdclk)
{
	if (cdclk > 556800)
		return 3;
	else if (cdclk > 480000)
		return 2;
	else if (cdclk > 312000)
		return 1;
	else
		return 0;
}

static void icl_readout_refclk(struct drm_i915_private *dev_priv,
			       struct intel_cdclk_config *cdclk_config)
{
@@ -3242,6 +3254,13 @@ static const struct intel_cdclk_funcs mtl_cdclk_funcs = {
	.calc_voltage_level = tgl_calc_voltage_level,
};

static const struct intel_cdclk_funcs rplu_cdclk_funcs = {
	.get_cdclk = bxt_get_cdclk,
	.set_cdclk = bxt_set_cdclk,
	.modeset_calc_cdclk = bxt_modeset_calc_cdclk,
	.calc_voltage_level = rplu_calc_voltage_level,
};

static const struct intel_cdclk_funcs tgl_cdclk_funcs = {
	.get_cdclk = bxt_get_cdclk,
	.set_cdclk = bxt_set_cdclk,
@@ -3384,14 +3403,17 @@ void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv)
		dev_priv->display.funcs.cdclk = &tgl_cdclk_funcs;
		dev_priv->display.cdclk.table = dg2_cdclk_table;
	} else if (IS_ALDERLAKE_P(dev_priv)) {
		dev_priv->display.funcs.cdclk = &tgl_cdclk_funcs;
		/* Wa_22011320316:adl-p[a0] */
		if (IS_ADLP_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0))
		if (IS_ADLP_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0)) {
			dev_priv->display.cdclk.table = adlp_a_step_cdclk_table;
		else if (IS_ADLP_RPLU(dev_priv))
			dev_priv->display.funcs.cdclk = &tgl_cdclk_funcs;
		} else if (IS_ADLP_RPLU(dev_priv)) {
			dev_priv->display.cdclk.table = rplu_cdclk_table;
		else
			dev_priv->display.funcs.cdclk = &rplu_cdclk_funcs;
		} else {
			dev_priv->display.cdclk.table = adlp_cdclk_table;
			dev_priv->display.funcs.cdclk = &tgl_cdclk_funcs;
		}
	} else if (IS_ROCKETLAKE(dev_priv)) {
		dev_priv->display.funcs.cdclk = &tgl_cdclk_funcs;
		dev_priv->display.cdclk.table = rkl_cdclk_table;
+1 −1
Original line number Diff line number Diff line
@@ -129,7 +129,7 @@ static int intel_dp_aux_sync_len(void)

static int intel_dp_aux_fw_sync_len(void)
{
	int precharge = 16; /* 10-16 */
	int precharge = 10; /* 10-16 */
	int preamble = 8;

	return precharge + preamble;
+10 −4
Original line number Diff line number Diff line
@@ -346,8 +346,10 @@ static int live_parallel_switch(void *arg)
				continue;

			ce = intel_context_create(data[m].ce[0]->engine);
			if (IS_ERR(ce))
			if (IS_ERR(ce)) {
				err = PTR_ERR(ce);
				goto out;
			}

			err = intel_context_pin(ce);
			if (err) {
@@ -367,8 +369,10 @@ static int live_parallel_switch(void *arg)

		worker = kthread_create_worker(0, "igt/parallel:%s",
					       data[n].ce[0]->engine->name);
		if (IS_ERR(worker))
		if (IS_ERR(worker)) {
			err = PTR_ERR(worker);
			goto out;
		}

		data[n].worker = worker;
	}
@@ -397,8 +401,10 @@ static int live_parallel_switch(void *arg)
			}
		}

		if (igt_live_test_end(&t))
			err = -EIO;
		if (igt_live_test_end(&t)) {
			err = err ?: -EIO;
			break;
		}
	}

out:
+8 −4
Original line number Diff line number Diff line
@@ -1530,8 +1530,8 @@ static int live_busywait_preempt(void *arg)
	struct drm_i915_gem_object *obj;
	struct i915_vma *vma;
	enum intel_engine_id id;
	int err = -ENOMEM;
	u32 *map;
	int err;

	/*
	 * Verify that even without HAS_LOGICAL_RING_PREEMPTION, we can
@@ -1539,13 +1539,17 @@ static int live_busywait_preempt(void *arg)
	 */

	ctx_hi = kernel_context(gt->i915, NULL);
	if (!ctx_hi)
		return -ENOMEM;
	if (IS_ERR(ctx_hi))
		return PTR_ERR(ctx_hi);

	ctx_hi->sched.priority = I915_CONTEXT_MAX_USER_PRIORITY;

	ctx_lo = kernel_context(gt->i915, NULL);
	if (!ctx_lo)
	if (IS_ERR(ctx_lo)) {
		err = PTR_ERR(ctx_lo);
		goto err_ctx_hi;
	}

	ctx_lo->sched.priority = I915_CONTEXT_MIN_USER_PRIORITY;

	obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);