Commit b1913ff4 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-fixes-6.4-2023-06-07' of... 

Merge tag 'amd-drm-fixes-6.4-2023-06-07' of https://gitlab.freedesktop.org/agd5f/linux

 into drm-fixes

amd-drm-fixes-6.4-2023-06-07:

amdgpu:
- S0ix fixes
- GPU reset fixes
- SMU13 fixes
- SMU11 fixes
- Misc Display fixes
- Revert RV/RV2/PCO clock counter changes
- Fix Stoney xclk value
- Fix reserved vram debug info

radeon:
- Fix a potential use after free

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230607213740.7723-1-alexander.deucher@amd.com
parents 9561de3a e1a60020

drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c

+8 −4
Original line number Diff line number Diff line
@@ -1092,16 +1092,20 @@ bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) 
	 * S0ix even though the system is suspending to idle, so return false

	 * in that case.

	 */

	if (!(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0))

		dev_warn_once(adev->dev,

	if (!(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0)) {

		dev_err_once(adev->dev,

			      "Power consumption will be higher as BIOS has not been configured for suspend-to-idle.\n"

			      "To use suspend-to-idle change the sleep mode in BIOS setup.\n");

		return false;

	}



#if !IS_ENABLED(CONFIG_AMD_PMC)

	dev_warn_once(adev->dev,

	dev_err_once(adev->dev,

		      "Power consumption will be higher as the kernel has not been compiled with CONFIG_AMD_PMC.\n");

#endif /* CONFIG_AMD_PMC */

	return false;

#else

	return true;

#endif /* CONFIG_AMD_PMC */

}



#endif /* CONFIG_SUSPEND */

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

+4 −6
Original line number Diff line number Diff line
@@ -79,9 +79,10 @@ static void amdgpu_bo_user_destroy(struct ttm_buffer_object *tbo) 
static void amdgpu_bo_vm_destroy(struct ttm_buffer_object *tbo)

{

	struct amdgpu_device *adev = amdgpu_ttm_adev(tbo->bdev);

	struct amdgpu_bo *bo = ttm_to_amdgpu_bo(tbo);

	struct amdgpu_bo *shadow_bo = ttm_to_amdgpu_bo(tbo), *bo;

	struct amdgpu_bo_vm *vmbo;



	bo = shadow_bo->parent;

	vmbo = to_amdgpu_bo_vm(bo);

	/* in case amdgpu_device_recover_vram got NULL of bo->parent */

	if (!list_empty(&vmbo->shadow_list)) {
@@ -694,11 +695,6 @@ int amdgpu_bo_create_vm(struct amdgpu_device *adev, 
		return r;



	*vmbo_ptr = to_amdgpu_bo_vm(bo_ptr);

	INIT_LIST_HEAD(&(*vmbo_ptr)->shadow_list);

	/* Set destroy callback to amdgpu_bo_vm_destroy after vmbo->shadow_list

	 * is initialized.

	 */

	bo_ptr->tbo.destroy = &amdgpu_bo_vm_destroy;

	return r;

}
@@ -715,6 +711,8 @@ void amdgpu_bo_add_to_shadow_list(struct amdgpu_bo_vm *vmbo) 


	mutex_lock(&adev->shadow_list_lock);

	list_add_tail(&vmbo->shadow_list, &adev->shadow_list);

	vmbo->shadow->parent = amdgpu_bo_ref(&vmbo->bo);

	vmbo->shadow->tbo.destroy = &amdgpu_bo_vm_destroy;

	mutex_unlock(&adev->shadow_list_lock);

}

drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c

+0 −1
Original line number Diff line number Diff line
@@ -564,7 +564,6 @@ int amdgpu_vm_pt_create(struct amdgpu_device *adev, struct amdgpu_vm *vm, 
		return r;

	}



	(*vmbo)->shadow->parent = amdgpu_bo_ref(bo);

	amdgpu_bo_add_to_shadow_list(*vmbo);



	return 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c

+4 −3
Original line number Diff line number Diff line
@@ -800,7 +800,7 @@ static void amdgpu_vram_mgr_debug(struct ttm_resource_manager *man, 
{

	struct amdgpu_vram_mgr *mgr = to_vram_mgr(man);

	struct drm_buddy *mm = &mgr->mm;

	struct drm_buddy_block *block;

	struct amdgpu_vram_reservation *rsv;



	drm_printf(printer, "  vis usage:%llu\n",

		   amdgpu_vram_mgr_vis_usage(mgr));
@@ -812,8 +812,9 @@ static void amdgpu_vram_mgr_debug(struct ttm_resource_manager *man, 
	drm_buddy_print(mm, printer);



	drm_printf(printer, "reserved:\n");

	list_for_each_entry(block, &mgr->reserved_pages, link)

		drm_buddy_block_print(mm, block, printer);

	list_for_each_entry(rsv, &mgr->reserved_pages, blocks)

		drm_printf(printer, "%#018llx-%#018llx: %llu\n",

			rsv->start, rsv->start + rsv->size, rsv->size);

	mutex_unlock(&mgr->lock);

}

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+0 −35
Original line number Diff line number Diff line
@@ -149,16 +149,6 @@ MODULE_FIRMWARE("amdgpu/aldebaran_sjt_mec2.bin"); 
#define mmGOLDEN_TSC_COUNT_LOWER_Renoir                0x0026

#define mmGOLDEN_TSC_COUNT_LOWER_Renoir_BASE_IDX       1



#define mmGOLDEN_TSC_COUNT_UPPER_Raven   0x007a

#define mmGOLDEN_TSC_COUNT_UPPER_Raven_BASE_IDX 0

#define mmGOLDEN_TSC_COUNT_LOWER_Raven   0x007b

#define mmGOLDEN_TSC_COUNT_LOWER_Raven_BASE_IDX 0



#define mmGOLDEN_TSC_COUNT_UPPER_Raven2   0x0068

#define mmGOLDEN_TSC_COUNT_UPPER_Raven2_BASE_IDX 0

#define mmGOLDEN_TSC_COUNT_LOWER_Raven2   0x0069

#define mmGOLDEN_TSC_COUNT_LOWER_Raven2_BASE_IDX 0



enum ta_ras_gfx_subblock {

	/*CPC*/

	TA_RAS_BLOCK__GFX_CPC_INDEX_START = 0,
@@ -4004,31 +3994,6 @@ static uint64_t gfx_v9_0_get_gpu_clock_counter(struct amdgpu_device *adev) 
		preempt_enable();

		clock = clock_lo | (clock_hi << 32ULL);

		break;

	case IP_VERSION(9, 1, 0):

	case IP_VERSION(9, 2, 2):

		preempt_disable();

		if (adev->rev_id >= 0x8) {

			clock_hi = RREG32_SOC15_NO_KIQ(PWR, 0, mmGOLDEN_TSC_COUNT_UPPER_Raven2);

			clock_lo = RREG32_SOC15_NO_KIQ(PWR, 0, mmGOLDEN_TSC_COUNT_LOWER_Raven2);

			hi_check = RREG32_SOC15_NO_KIQ(PWR, 0, mmGOLDEN_TSC_COUNT_UPPER_Raven2);

		} else {

			clock_hi = RREG32_SOC15_NO_KIQ(PWR, 0, mmGOLDEN_TSC_COUNT_UPPER_Raven);

			clock_lo = RREG32_SOC15_NO_KIQ(PWR, 0, mmGOLDEN_TSC_COUNT_LOWER_Raven);

			hi_check = RREG32_SOC15_NO_KIQ(PWR, 0, mmGOLDEN_TSC_COUNT_UPPER_Raven);

		}

		/* The PWR TSC clock frequency is 100MHz, which sets 32-bit carry over

		* roughly every 42 seconds.

		*/

		if (hi_check != clock_hi) {

			if (adev->rev_id >= 0x8)

				clock_lo = RREG32_SOC15_NO_KIQ(PWR, 0, mmGOLDEN_TSC_COUNT_LOWER_Raven2);

			else

				clock_lo = RREG32_SOC15_NO_KIQ(PWR, 0, mmGOLDEN_TSC_COUNT_LOWER_Raven);

			clock_hi = hi_check;

		}

		preempt_enable();

		clock = clock_lo | (clock_hi << 32ULL);

		break;

	default:

		amdgpu_gfx_off_ctrl(adev, false);

		mutex_lock(&adev->gfx.gpu_clock_mutex);