virtio_pci: extract the logic of active vq for modern pci

mainline inclusion
from mainline-v6.0-rc1
commit 56bdc061
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I5WXCZ
CVE: NA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=56bdc06139404b3b06ed75ec99b93445d7e0b8c3



----------------------------------------------------------------------

Introduce vp_active_vq() to configure vring to backend after vq attach
vring. And configure vq vector if necessary.

Signed-off-by: Xuan Zhuo <xuanzhuo@linux.alibaba.com>
Acked-by: Jason Wang <jasowang@redhat.com>
Message-Id: <20220801063902.129329-32-xuanzhuo@linux.alibaba.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Pengyuan Zhao <zhaopengyuan@hisilicon.com>