Commit d3e32f84 authored by Brad Larson's avatar Brad Larson Committed by Ulf Hansson
Browse files

mmc: sdhci-cadence: Enable device specific override of writel() 



SoCs with device specific Cadence implementation, such as setting
byte-enables before the write, need to override writel().  Add a
callback where the default is writel() for all existing chips.

Signed-off-by: default avatarBrad Larson <blarson@amd.com>
Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20230410184526.15990-12-blarson@amd.com


Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 82e4726b

drivers/mmc/host/sdhci-cadence.c

+13 −5
Original line number Diff line number Diff line
@@ -67,6 +67,7 @@ struct sdhci_cdns_phy_param { 
struct sdhci_cdns_priv {

	void __iomem *hrs_addr;

	bool enhanced_strobe;

	void (*priv_writel)(struct sdhci_cdns_priv *priv, u32 val, void __iomem *reg);

	unsigned int nr_phy_params;

	struct sdhci_cdns_phy_param phy_params[];

};
@@ -90,6 +91,12 @@ static const struct sdhci_cdns_phy_cfg sdhci_cdns_phy_cfgs[] = { 
	{ "cdns,phy-dll-delay-strobe", SDHCI_CDNS_PHY_DLY_STROBE, },

};



static inline void cdns_writel(struct sdhci_cdns_priv *priv, u32 val,

			       void __iomem *reg)

{

	writel(val, reg);

}



static int sdhci_cdns_write_phy_reg(struct sdhci_cdns_priv *priv,

				    u8 addr, u8 data)

{
@@ -104,17 +111,17 @@ static int sdhci_cdns_write_phy_reg(struct sdhci_cdns_priv *priv, 


	tmp = FIELD_PREP(SDHCI_CDNS_HRS04_WDATA, data) |

	      FIELD_PREP(SDHCI_CDNS_HRS04_ADDR, addr);

	writel(tmp, reg);

	priv->priv_writel(priv, tmp, reg);



	tmp |= SDHCI_CDNS_HRS04_WR;

	writel(tmp, reg);

	priv->priv_writel(priv, tmp, reg);



	ret = readl_poll_timeout(reg, tmp, tmp & SDHCI_CDNS_HRS04_ACK, 0, 10);

	if (ret)

		return ret;



	tmp &= ~SDHCI_CDNS_HRS04_WR;

	writel(tmp, reg);

	priv->priv_writel(priv, tmp, reg);



	ret = readl_poll_timeout(reg, tmp, !(tmp & SDHCI_CDNS_HRS04_ACK),

				 0, 10);
@@ -191,7 +198,7 @@ static void sdhci_cdns_set_emmc_mode(struct sdhci_cdns_priv *priv, u32 mode) 
	tmp = readl(priv->hrs_addr + SDHCI_CDNS_HRS06);

	tmp &= ~SDHCI_CDNS_HRS06_MODE;

	tmp |= FIELD_PREP(SDHCI_CDNS_HRS06_MODE, mode);

	writel(tmp, priv->hrs_addr + SDHCI_CDNS_HRS06);

	priv->priv_writel(priv, tmp, priv->hrs_addr + SDHCI_CDNS_HRS06);

}



static u32 sdhci_cdns_get_emmc_mode(struct sdhci_cdns_priv *priv)
@@ -223,7 +230,7 @@ static int sdhci_cdns_set_tune_val(struct sdhci_host *host, unsigned int val) 
	 */

	for (i = 0; i < 2; i++) {

		tmp |= SDHCI_CDNS_HRS06_TUNE_UP;

		writel(tmp, reg);

		priv->priv_writel(priv, tmp, reg);



		ret = readl_poll_timeout(reg, tmp,

					 !(tmp & SDHCI_CDNS_HRS06_TUNE_UP),
@@ -386,6 +393,7 @@ static int sdhci_cdns_probe(struct platform_device *pdev) 
	priv->nr_phy_params = nr_phy_params;

	priv->hrs_addr = host->ioaddr;

	priv->enhanced_strobe = false;

	priv->priv_writel = cdns_writel;

	host->ioaddr += SDHCI_CDNS_SRS_BASE;

	host->mmc_host_ops.hs400_enhanced_strobe =

				sdhci_cdns_hs400_enhanced_strobe;