Commit 82e4726b authored by Brad Larson's avatar Brad Larson Committed by Ulf Hansson
Browse files

dt-bindings: mmc: cdns: Add AMD Pensando Elba SoC 



AMD Pensando Elba ARM 64-bit SoC is integrated with this IP and
explicitly controls byte-lane enables.

Signed-off-by: default avatarBrad Larson <blarson@amd.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230410184526.15990-3-blarson@amd.com


Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent f695c5f9

Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml

+23 −4
Original line number Diff line number Diff line
@@ -9,19 +9,18 @@ title: Cadence SD/SDIO/eMMC Host Controller (SD4HC) 
maintainers:

  - Masahiro Yamada <yamada.masahiro@socionext.com>



allOf:

  - $ref: mmc-controller.yaml



properties:

  compatible:

    items:

      - enum:

          - amd,pensando-elba-sd4hc

          - microchip,mpfs-sd4hc

          - socionext,uniphier-sd4hc

      - const: cdns,sd4hc



  reg:

    maxItems: 1

    minItems: 1

    maxItems: 2



  interrupts:

    maxItems: 1
@@ -120,6 +119,26 @@ required: 
  - interrupts

  - clocks



allOf:

  - $ref: mmc-controller.yaml

  - if:

      properties:

        compatible:

          contains:

            const: amd,pensando-elba-sd4hc

    then:

      properties:

        reg:

          items:

            - description: Host controller registers

            - description: Elba byte-lane enable register for writes

      required:

        - resets

    else:

      properties:

        reg:

          maxItems: 1



unevaluatedProperties: false



examples: