Commit d03b282b authored by Yazen Ghannam's avatar Yazen Ghannam Committed by Pu Wen
Browse files

EDAC/amd64: Add new register offset support and related changes

mainline inclusion
from mainline-v5.18-rc1
commit 2151c84e
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I7DX6V
CVE: NA

Reference: https://git.kernel.org/torvalds/c/2151c84ece920dc55942495004a823cbecb921e5



---------------------------

commit 2151c84e upstream.

Introduce a "family flags" bitmask that can be used to indicate any
special behavior needed on a per-family basis.

Add a flag to indicate a system uses the new register offsets introduced
with Family 19h Model 10h.

Use this flag to account for register offset changes, a new bitfield
indicating DDR5 use on a memory controller, and to set the proper number
of chip select masks.

Rework f17_addr_mask_to_cs_size() to properly handle the change in chip
select masks. And update code comments to reflect the updated Chip
Select, DIMM, and Mask relationships.

[uninitialized variable warning]
Reported-by: default avatarkernel test robot <lkp@intel.com>
Signed-off-by: default avatarYazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Reviewed-by: default avatarWilliam Roche <william.roche@oracle.com>
Link: https://lore.kernel.org/r/20220202144307.2678405-3-yazen.ghannam@amd.com


Signed-off-by: default avatarPu Wen <puwen@hygon.cn>
parent 74b2d582
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